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Message-ID: <07907c20-b9f8-4721-9899-39083fea672a@kernel.org>
Date: Mon, 5 Aug 2024 07:52:19 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: David Virag <virag.david003@...il.com>, Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Alim Akhtar <alim.akhtar@...sung.com>,
Sylwester Nawrocki <s.nawrocki@...sung.com>,
Chanwoo Choi <cw00.choi@...sung.com>,
Michael Turquette <mturquette@...libre.com>, Stephen Boyd
<sboyd@...nel.org>, Thinh Nguyen <Thinh.Nguyen@...opsys.com>,
Peter Griffin <peter.griffin@...aro.org>,
André Draszik <andre.draszik@...aro.org>,
Sam Protsenko <semen.protsenko@...aro.org>,
Marek Szyprowski <m.szyprowski@...sung.com>
Cc: linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-usb@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-samsung-soc@...r.kernel.org,
linux-clk@...r.kernel.org
Subject: Re: [PATCH 11/13] phy: exynos5-usbdrd: support Exynos7885 USB PHY
On 04/08/2024 23:53, David Virag wrote:
> The Exynos7885 SoC has an Exynos USB PHY that theoretically supports
> USB3 SuperSpeed, but all known devices using it only have USB2 and the
> vendor driver has USB3 function stubbed out, so we'll only support USB2.
>
> Apart from this mysterius USB3 capability, it's the closest to Exynos850
> out of those supported. Unlike other SoCs though, this one doesn't set
> the reference clock by default, so we have to set it manually.
> For this, create a set_ref_clk_rate property in drvdata that can be set
> to a predefined value to set the clockrate to.
>
> Signed-off-by: David Virag <virag.david003@...il.com>
> ---
> drivers/phy/samsung/phy-exynos5-usbdrd.c | 21 +++++++++++++++++++++
> include/linux/soc/samsung/exynos-regs-pmu.h | 3 +++
> 2 files changed, 24 insertions(+)
>
> diff --git a/drivers/phy/samsung/phy-exynos5-usbdrd.c b/drivers/phy/samsung/phy-exynos5-usbdrd.c
> index df52b78a120b..466c72d8a93c 100644
> --- a/drivers/phy/samsung/phy-exynos5-usbdrd.c
> +++ b/drivers/phy/samsung/phy-exynos5-usbdrd.c
> @@ -367,6 +367,7 @@ struct exynos5_usbdrd_phy_drvdata {
> int n_clks;
> const char * const *core_clk_names;
> int n_core_clks;
> + u32 set_ref_clk_rate;
Rate is in unsigned long.
Best regards,
Krzysztof
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