[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <20240805-phy-qcom-qmp-pcie-write-all-tbls-second-port-v3-1-6967c6bf61d1@linaro.org>
Date: Mon, 05 Aug 2024 19:45:18 +0300
From: Abel Vesa <abel.vesa@...aro.org>
To: Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>
Cc: Johan Hovold <johan+linaro@...nel.org>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
linux-kernel@...r.kernel.org, Qiang Yu <quic_qianyu@...cinc.com>,
Abel Vesa <abel.vesa@...aro.org>
Subject: [PATCH v3] phy: qcom: qmp-pcie: Configure all tables on port B PHY
From: Qiang Yu <quic_qianyu@...cinc.com>
Currently, only the RX and TX tables are written to the second PHY
(port B) when the 4-lanes mode is configured, but according to Qualcomm
internal documentation, the pcs, pcs_misc, serdes and ln_shrd tables need
to be written as well.
Signed-off-by: Qiang Yu <quic_qianyu@...cinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Signed-off-by: Abel Vesa <abel.vesa@...aro.org>
---
Changes in v3:
- Rebased on phy/next
- Fetched Dmitry's R-b tag
- Link to v2: https://lore.kernel.org/r/20240801-phy-qcom-qmp-pcie-write-all-tbls-second-port-v2-1-6e53c701e87e@linaro.org
Changes in v2:
- Reordered tables as Johan has suggested
- Link to v1: https://lore.kernel.org/r/20240726-phy-qcom-qmp-pcie-write-all-tbls-second-port-v1-1-751b9ee01184@linaro.org
---
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
index 4b4a10f7f6d6..a7e2ce0c500d 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
@@ -3669,18 +3669,30 @@ static void qmp_pcie_init_port_b(struct qmp_pcie *qmp, const struct qmp_phy_cfg_
{
const struct qmp_phy_cfg *cfg = qmp->cfg;
const struct qmp_pcie_offsets *offs = cfg->offsets;
- void __iomem *tx3, *rx3, *tx4, *rx4;
+ void __iomem *serdes, *tx3, *rx3, *tx4, *rx4, *pcs, *pcs_misc, *ln_shrd;
+ serdes = qmp->port_b + offs->serdes;
tx3 = qmp->port_b + offs->tx;
rx3 = qmp->port_b + offs->rx;
tx4 = qmp->port_b + offs->tx2;
rx4 = qmp->port_b + offs->rx2;
+ pcs = qmp->port_b + offs->pcs;
+ pcs_misc = qmp->port_b + offs->pcs_misc;
+ ln_shrd = qmp->port_b + offs->ln_shrd;
+
+ qmp_configure(qmp->dev, serdes, tbls->serdes, tbls->serdes_num);
+ qmp_configure(qmp->dev, serdes, cfg->serdes_4ln_tbl, cfg->serdes_4ln_num);
qmp_configure_lane(qmp->dev, tx3, tbls->tx, tbls->tx_num, 1);
qmp_configure_lane(qmp->dev, rx3, tbls->rx, tbls->rx_num, 1);
qmp_configure_lane(qmp->dev, tx4, tbls->tx, tbls->tx_num, 2);
qmp_configure_lane(qmp->dev, rx4, tbls->rx, tbls->rx_num, 2);
+
+ qmp_configure(qmp->dev, pcs, tbls->pcs, tbls->pcs_num);
+ qmp_configure(qmp->dev, pcs_misc, tbls->pcs_misc, tbls->pcs_misc_num);
+
+ qmp_configure(qmp->dev, ln_shrd, tbls->ln_shrd, tbls->ln_shrd_num);
}
static void qmp_pcie_init_registers(struct qmp_pcie *qmp, const struct qmp_phy_cfg_tbls *tbls)
---
base-commit: d6dbc9f56c3a70e915625b6f1887882c23dc5c91
change-id: 20240725-phy-qcom-qmp-pcie-write-all-tbls-second-port-8efeced876bf
Best regards,
--
Abel Vesa <abel.vesa@...aro.org>
Powered by blists - more mailing lists