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Message-ID: <314821a5-43e1-4c96-ad8d-188bca8ae0a1@roeck-us.net>
Date: Thu, 8 Aug 2024 17:50:32 -0700
From: Guenter Roeck <linux@...ck-us.net>
To: John David Anglin <dave.anglin@...l.net>,
Linus Torvalds <torvalds@...ux-foundation.org>,
Thomas Gleixner <tglx@...utronix.de>
Cc: Vlastimil Babka <vbabka@...e.cz>, linux-kernel@...r.kernel.org,
Linux-MM <linux-mm@...ck.org>, Helge Deller <deller@....de>,
linux-parisc@...r.kernel.org,
Richard Henderson <richard.henderson@...aro.org>
Subject: Re: [PATCH 6.10 000/809] 6.10.3-rc3 review
On 8/8/24 14:50, John David Anglin wrote:
> On 2024-08-08 4:52 p.m., Guenter Roeck wrote:
>> On 8/8/24 11:19, Linus Torvalds wrote:
>>> On Thu, 8 Aug 2024 at 10:48, Thomas Gleixner <tglx@...utronix.de> wrote:
>>>>
>>>> Here is the disassembly from my latest crashing debug kernel which
>>>> shifts it up a couple of pages. Add 0x10 or sub 0x20 to make it work.
>>>
>>> Looks like I was off by an instruction, it's the 28th divide-step (not
>>> 29) that does the page crosser:
>>>
>>>> 4121dffc: 0b 21 04 41 ds r1,r25,r1
>>>> 4121e000: 0b bd 07 1d add,c ret1,ret1,ret1
> I think this macro might clobber the C/B bits on a ITLB missing:
>
> /* This is for ILP32 PA2.0 only. The TLB insertion needs
> * to extend into I/O space if the address is 0xfXXXXXXX
> * so we extend the f's into the top word of the pte in
> * this case */
> .macro f_extend pte,tmp
> extrd,s \pte,42,4,\tmp
> addi,<> 1,\tmp,%r0
> extrd,s \pte,63,25,\pte
> .endm
>
> The addi instruction affects the C/B bits. However, it is only used for 32-bit PA 2.0 kernels.
> A second tmp register would be needed to change the addi to an add logical.
>
> The mode likely problem is the shladd instruction in the following macro in entry.S:
>
> .macro L2_ptep pmd,pte,index,va,fault
> #if CONFIG_PGTABLE_LEVELS == 3
> extru_safe \va,31-ASM_PMD_SHIFT,ASM_BITS_PER_PMD,\index
> #else
> extru_safe \va,31-ASM_PGDIR_SHIFT,ASM_BITS_PER_PGD,\index
> #endif
> dep %r0,31,PAGE_SHIFT,\pmd /* clear offset */
> #if CONFIG_PGTABLE_LEVELS < 3
> copy %r0,\pte
> #endif
> ldw,s \index(\pmd),\pmd
> bb,>=,n \pmd,_PxD_PRESENT_BIT,\fault
> dep %r0,31,PxD_FLAG_SHIFT,\pmd /* clear flags */
> SHLREG \pmd,PxD_VALUE_SHIFT,\pmd
> extru_safe \va,31-PAGE_SHIFT,ASM_BITS_PER_PTE,\index
> dep %r0,31,PAGE_SHIFT,\pmd /* clear offset */
> shladd \index,BITS_PER_PTE_ENTRY,\pmd,\pmd /* pmd is now pte */
> .endm
>
> I believe the shladd instruction should be changed to shladd,l (shift left and add logical).
>
That doesn't help, at least not in qemu.
Guenter
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