linux-kernel - Re: [PATCH v4] drm/mediatek: dsi: Add dsi per-frame lp code for mt8188

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Message-ID: <ac28d576de8ef20ff0927fc1779c7ede57c8d251.camel@mediatek.com>
Date: Fri, 9 Aug 2024 08:15:44 +0000
From: CK Hu (胡俊光) <ck.hu@...iatek.com>
To: Shuijing Li (李水静) <Shuijing.Li@...iatek.com>,
	"chunkuang.hu@...nel.org" <chunkuang.hu@...nel.org>,
	Jitao Shi (石记涛) <jitao.shi@...iatek.com>,
	"daniel@...ll.ch" <daniel@...ll.ch>, "p.zabel@...gutronix.de"
	<p.zabel@...gutronix.de>, "airlied@...il.com" <airlied@...il.com>,
	"matthias.bgg@...il.com" <matthias.bgg@...il.com>,
	"angelogioacchino.delregno@...labora.com"
	<angelogioacchino.delregno@...labora.com>
CC: "dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-mediatek@...ts.infradead.org" <linux-mediatek@...ts.infradead.org>,
	"linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, Project_Global_Chrome_Upstream_Group
	<Project_Global_Chrome_Upstream_Group@...iatek.com>
Subject: Re: [PATCH v4] drm/mediatek: dsi: Add dsi per-frame lp code for
 mt8188

Hi, Shuijing:

On Thu, 2024-08-01 at 16:11 +0800, Shuijing Li wrote:
> Adding the per-frame lp function of mt8188, which can keep HFP in HS and
> reduce the time required for each line to enter and exit low power.
> Per Frame LP:
>   |<----------One Active Frame-------->|
> --______________________________________----___________________
>   ^HSA+HBP^^RGB^^HFP^^HSA+HBP^^RGB^^HFP^    ^HSA+HBP^^RGB^^HFP^
> 
> Per Line LP:
>   |<---------------One Active Frame----------->|
> --______________--______________--______________----______________
>   ^HSA+HBP^^RGB^  ^HSA+HBP^^RGB^  ^HSA+HBP^^RGB^    ^HSA+HBP^^RGB^
> 
> Signed-off-by: Shuijing Li <shuijing.li@...iatek.com>
> ---

[snip]

> +
>  static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi)
>  {
>  	u32 horizontal_sync_active_byte;
> @@ -449,57 +560,61 @@ static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi)
>  	writel(vm->vfront_porch, dsi->regs + DSI_VFP_NL);
>  	writel(vm->vactive, dsi->regs + DSI_VACT_NL);
>  
> -	if (dsi->driver_data->has_size_ctl)
> -		writel(FIELD_PREP(DSI_HEIGHT, vm->vactive) |
> -		       FIELD_PREP(DSI_WIDTH, vm->hactive),
> -		       dsi->regs + DSI_SIZE_CON);

If support_per_frame_lp is true, this code would not be execute,
but has_size_ctl is true in mt8188.
Does this mean when support_per_frame_lp is true, has_size_ctl should be false?

Regards,
CK

> -
> -	horizontal_sync_active_byte = (vm->hsync_len * dsi_tmp_buf_bpp - 10);
> -
> -	if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE)
> -		horizontal_backporch_byte = vm->hback_porch * dsi_tmp_buf_bpp - 10;
> -	else
> -		horizontal_backporch_byte = (vm->hback_porch + vm->hsync_len) *
> -					    dsi_tmp_buf_bpp - 10;
> -
> -	data_phy_cycles = timing->lpx + timing->da_hs_prepare +
> -			  timing->da_hs_zero + timing->da_hs_exit + 3;
> -
> -	delta = dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST ? 18 : 12;
> -	delta += dsi->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET ? 0 : 2;
> +	if (dsi->driver_data->support_per_frame_lp)
> +		mtk_dsi_config_vdo_timing_per_frame_lp(dsi);
> +	else {
> +		if (dsi->driver_data->has_size_ctl)
> +			writel(FIELD_PREP(DSI_HEIGHT, vm->vactive) |
> +				FIELD_PREP(DSI_WIDTH, vm->hactive),
> +				dsi->regs + DSI_SIZE_CON);
>  
> -	horizontal_frontporch_byte = vm->hfront_porch * dsi_tmp_buf_bpp;
> -	horizontal_front_back_byte = horizontal_frontporch_byte + horizontal_backporch_byte;
> -	data_phy_cycles_byte = data_phy_cycles * dsi->lanes + delta;
> +		horizontal_sync_active_byte = (vm->hsync_len * dsi_tmp_buf_bpp - 10);
>  
> -	if (horizontal_front_back_byte > data_phy_cycles_byte) {
> -		horizontal_frontporch_byte -= data_phy_cycles_byte *
> -					      horizontal_frontporch_byte /
> -					      horizontal_front_back_byte;
> -
> -		horizontal_backporch_byte -= data_phy_cycles_byte *
> -					     horizontal_backporch_byte /
> -					     horizontal_front_back_byte;
> -	} else {
> -		DRM_WARN("HFP + HBP less than d-phy, FPS will under 60Hz\n");
> -	}
> -
> -	if ((dsi->mode_flags & MIPI_DSI_HS_PKT_END_ALIGNED) &&
> -	    (dsi->lanes == 4)) {
> -		horizontal_sync_active_byte =
> -			roundup(horizontal_sync_active_byte, dsi->lanes) - 2;
> -		horizontal_frontporch_byte =
> -			roundup(horizontal_frontporch_byte, dsi->lanes) - 2;
> -		horizontal_backporch_byte =
> -			roundup(horizontal_backporch_byte, dsi->lanes) - 2;
> -		horizontal_backporch_byte -=
> -			(vm->hactive * dsi_tmp_buf_bpp + 2) % dsi->lanes;
> +		if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE)
> +			horizontal_backporch_byte = vm->hback_porch * dsi_tmp_buf_bpp - 10;
> +		else
> +			horizontal_backporch_byte = (vm->hback_porch + vm->hsync_len) *
> +							dsi_tmp_buf_bpp - 10;
> +
> +		data_phy_cycles = timing->lpx + timing->da_hs_prepare +
> +				timing->da_hs_zero + timing->da_hs_exit + 3;
> +
> +		delta = dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST ? 18 : 12;
> +		delta += dsi->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET ? 0 : 2;
> +
> +		horizontal_frontporch_byte = vm->hfront_porch * dsi_tmp_buf_bpp;
> +		horizontal_front_back_byte = horizontal_frontporch_byte + horizontal_backporch_byte;
> +		data_phy_cycles_byte = data_phy_cycles * dsi->lanes + delta;
> +
> +		if (horizontal_front_back_byte > data_phy_cycles_byte) {
> +			horizontal_frontporch_byte -= data_phy_cycles_byte *
> +							horizontal_frontporch_byte /
> +							horizontal_front_back_byte;
> +
> +			horizontal_backporch_byte -= data_phy_cycles_byte *
> +							horizontal_backporch_byte /
> +							horizontal_front_back_byte;
> +		} else {
> +			DRM_WARN("HFP + HBP less than d-phy, FPS will under 60Hz\n");
> +		}
> +
> +		if ((dsi->mode_flags & MIPI_DSI_HS_PKT_END_ALIGNED) &&
> +			(dsi->lanes == 4)) {
> +			horizontal_sync_active_byte =
> +				roundup(horizontal_sync_active_byte, dsi->lanes) - 2;
> +			horizontal_frontporch_byte =
> +				roundup(horizontal_frontporch_byte, dsi->lanes) - 2;
> +			horizontal_backporch_byte =
> +				roundup(horizontal_backporch_byte, dsi->lanes) - 2;
> +			horizontal_backporch_byte -=
> +				(vm->hactive * dsi_tmp_buf_bpp + 2) % dsi->lanes;
> +		}
> +
> +		writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC);
> +		writel(horizontal_backporch_byte, dsi->regs + DSI_HBP_WC);
> +		writel(horizontal_frontporch_byte, dsi->regs + DSI_HFP_WC);
>  	}
>  
> -	writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC);
> -	writel(horizontal_backporch_byte, dsi->regs + DSI_HBP_WC);
> -	writel(horizontal_frontporch_byte, dsi->regs + DSI_HFP_WC);
> -
>  	mtk_dsi_ps_control(dsi, false);
>  }
>  
> @@ -1197,6 +1312,7 @@ static const struct mtk_dsi_driver_data mt8188_dsi_driver_data = {
>  	.has_shadow_ctl = true,
>  	.has_size_ctl = true,
>  	.cmdq_long_packet_ctl = true,
> +	.support_per_frame_lp = true,
>  };
>