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Message-ID: <a51a1f1138e40819dd1ac94fb4e036fbecbdc036.camel@mediatek.com>
Date: Fri, 9 Aug 2024 08:54:05 +0000
From: CK Hu (胡俊光) <ck.hu@...iatek.com>
To: Shuijing Li (李水静) <Shuijing.Li@...iatek.com>,
	"chunkuang.hu@...nel.org" <chunkuang.hu@...nel.org>,
	Jitao Shi (石记涛) <jitao.shi@...iatek.com>,
	"daniel@...ll.ch" <daniel@...ll.ch>, "p.zabel@...gutronix.de"
	<p.zabel@...gutronix.de>, "airlied@...il.com" <airlied@...il.com>,
	"matthias.bgg@...il.com" <matthias.bgg@...il.com>,
	"angelogioacchino.delregno@...labora.com"
	<angelogioacchino.delregno@...labora.com>
CC: "dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-mediatek@...ts.infradead.org" <linux-mediatek@...ts.infradead.org>,
	"linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, Project_Global_Chrome_Upstream_Group
	<Project_Global_Chrome_Upstream_Group@...iatek.com>
Subject: Re: [PATCH v4] drm/mediatek: dsi: Add dsi per-frame lp code for
 mt8188

Hi, Shuijing:

On Thu, 2024-08-01 at 16:11 +0800, Shuijing Li wrote:
> Adding the per-frame lp function of mt8188, which can keep HFP in HS and
> reduce the time required for each line to enter and exit low power.
> Per Frame LP:
>   |<----------One Active Frame-------->|
> --______________________________________----___________________
>   ^HSA+HBP^^RGB^^HFP^^HSA+HBP^^RGB^^HFP^    ^HSA+HBP^^RGB^^HFP^
> 
> Per Line LP:
>   |<---------------One Active Frame----------->|
> --______________--______________--______________----______________
>   ^HSA+HBP^^RGB^  ^HSA+HBP^^RGB^  ^HSA+HBP^^RGB^    ^HSA+HBP^^RGB^
> 
> Signed-off-by: Shuijing Li <shuijing.li@...iatek.com>
> ---

[snip]

>  
> +static void mtk_dsi_config_vdo_timing_per_frame_lp(struct mtk_dsi *dsi)
> +{
> +	u32 horizontal_sync_active_byte;
> +	u32 horizontal_backporch_byte;
> +	u32 horizontal_frontporch_byte;
> +	u32 dsi_tmp_buf_bpp;
> +	unsigned int lpx, da_hs_exit, da_hs_prep, da_hs_trail;
> +	unsigned int da_hs_zero, ps_wc, hs_vb_ps_wc;
> +	u32 v_active_roundup, hstx_cklp_wc;
> +	u32 hstx_cklp_wc_max, hstx_cklp_wc_min;
> +	struct videomode *vm = &dsi->vm;
> +
> +	if (dsi->format == MIPI_DSI_FMT_RGB565)
> +		dsi_tmp_buf_bpp = 2;
> +	else
> +		dsi_tmp_buf_bpp = 3;
> +
> +	da_hs_trail = dsi->phy_timing.da_hs_trail;
> +	ps_wc = dsi->vm.hactive * dsi_tmp_buf_bpp;
> +
> +	if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) {
> +		horizontal_sync_active_byte =
> +			vm->hsync_len * dsi_tmp_buf_bpp - 10;
> +		horizontal_backporch_byte =
> +			vm->hback_porch * dsi_tmp_buf_bpp - 10;
> +		horizontal_frontporch_byte =
> +			vm->hfront_porch * dsi_tmp_buf_bpp - 12;
> +
> +		v_active_roundup = (32 + horizontal_sync_active_byte +
> +			horizontal_backporch_byte + ps_wc +
> +			horizontal_frontporch_byte) % dsi->lanes;
> +		if (v_active_roundup)
> +			horizontal_backporch_byte = horizontal_backporch_byte +
> +				dsi->lanes - v_active_roundup;
> +		hstx_cklp_wc_min = (DIV_ROUND_UP((12 + 2 + 4 +
> +			horizontal_sync_active_byte), dsi->lanes) + da_hs_trail + 1)
> +			* dsi->lanes / 6 - 1;
> +		hstx_cklp_wc_max = (DIV_ROUND_UP((20 + 6 + 4 +
> +			horizontal_sync_active_byte + horizontal_backporch_byte +
> +			ps_wc), dsi->lanes) + da_hs_trail + 1) * dsi->lanes / 6 - 1;
> +	} else {
> +		horizontal_sync_active_byte = vm->hsync_len * dsi_tmp_buf_bpp - 4;
> +
> +		horizontal_backporch_byte = (vm->hback_porch + vm->hsync_len) *
> +			dsi_tmp_buf_bpp - 10;
> +		hstx_cklp_wc_min = (DIV_ROUND_UP(4, dsi->lanes) + da_hs_trail + 1)
> +			* dsi->lanes / 6 - 1;
> +
> +		if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) {
> +			horizontal_frontporch_byte = (vm->hfront_porch *
> +				dsi_tmp_buf_bpp - 18);
> +
> +			v_active_roundup = (28 + horizontal_backporch_byte + ps_wc +
> +				horizontal_frontporch_byte) % dsi->lanes;
> +			if (v_active_roundup)
> +				horizontal_backporch_byte = horizontal_backporch_byte +
> +				dsi->lanes - v_active_roundup;
> +
> +			hstx_cklp_wc_max = (DIV_ROUND_UP((12 + 4 + 4 +
> +				horizontal_backporch_byte + ps_wc),
> +				dsi->lanes) + da_hs_trail + 1) * dsi->lanes / 6 - 1;
> +		} else {
> +			horizontal_frontporch_byte = (vm->hfront_porch *
> +				dsi_tmp_buf_bpp - 12);

This function has many duplication. Maybe we could reduce them like this:

if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) {
	hfp_byte_adjust = 10;
	...
} else {
	...
	if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) {
		hfp_byte_adjust = 18;
	} else {
		hfp_byte_adjust = 12;
	}
}

horizontal_frontporch_byte = vm->hfront_porch * dsi_tmp_buf_bpp -
			     hfp_byte_adjust;

Regards,
CK

> +
> +			v_active_roundup = (22 + horizontal_backporch_byte + ps_wc +
> +				horizontal_frontporch_byte) % dsi->lanes;
> +			if (v_active_roundup)
> +				horizontal_backporch_byte = horizontal_backporch_byte +
> +				dsi->lanes - v_active_roundup;
> +
> +			hstx_cklp_wc_max = (DIV_ROUND_UP((12 + 4 + 4 +
> +				horizontal_backporch_byte + ps_wc),
> +				dsi->lanes) + da_hs_trail + 1) * dsi->lanes / 6 - 1;
> +		}
> +	}
> +	hstx_cklp_wc = FIELD_GET(HSTX_CKL_WC, readl(dsi->regs + DSI_HSTX_CKL_WC));
> +
> +	if (hstx_cklp_wc <= hstx_cklp_wc_min ||
> +		hstx_cklp_wc >= hstx_cklp_wc_max) {
> +		hstx_cklp_wc = ((hstx_cklp_wc_min + hstx_cklp_wc_max) / 2) << HSTX_CKL_WC_SHIFT;
> +		writel(hstx_cklp_wc, dsi->regs + DSI_HSTX_CKL_WC);
> +	}
> +	hstx_cklp_wc = hstx_cklp_wc >> HSTX_CKL_WC_SHIFT;
> +	if (hstx_cklp_wc <= hstx_cklp_wc_min ||
> +		hstx_cklp_wc >= hstx_cklp_wc_max) {
> +		DRM_WARN("Wrong setting of hstx_ckl_wc\n");
> +	}
> +
> +	lpx = dsi->phy_timing.lpx;
> +	da_hs_exit = dsi->phy_timing.da_hs_exit;
> +	da_hs_prep = dsi->phy_timing.da_hs_prepare;
> +	da_hs_zero = dsi->phy_timing.da_hs_zero;
> +
> +	hs_vb_ps_wc = ps_wc -
> +		(lpx + da_hs_exit + da_hs_prep + da_hs_zero + 2)
> +		* dsi->lanes;
> +	horizontal_frontporch_byte = (1 << HFP_HS_EN)
> +		| (hs_vb_ps_wc << HFP_HS_VB_PS_WC_SHIFT)
> +		| (horizontal_frontporch_byte);
> +
> +	writel(horizontal_sync_active_byte, dsi->regs + DSI_HSA_WC);
> +	writel(horizontal_backporch_byte, dsi->regs + DSI_HBP_WC);
> +	writel(horizontal_frontporch_byte, dsi->regs + DSI_HFP_WC);
> +}
> +

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