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Message-ID: <c1d3e601-80e3-4dd5-9eac-a8305af5b3b3@lunn.ch>
Date: Sun, 11 Aug 2024 17:47:37 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Parthiban Veerasooran <Parthiban.Veerasooran@...rochip.com>
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Subject: Re: [PATCH net-next v5 06/14] net: ethernet: oa_tc6: implement
internal PHY initialization
On Tue, Jul 30, 2024 at 09:38:58AM +0530, Parthiban Veerasooran wrote:
> Internal PHY is initialized as per the PHY register capability supported
> by the MAC-PHY. Direct PHY Register Access Capability indicates if PHY
> registers are directly accessible within the SPI register memory space.
> Indirect PHY Register Access Capability indicates if PHY registers are
> indirectly accessible through the MDIO/MDC registers MDIOACCn defined in
> OPEN Alliance specification. Currently the direct register access is only
> supported.
>
> Signed-off-by: Parthiban Veerasooran <Parthiban.Veerasooran@...rochip.com>
Reviewed-by: Andrew Lunn <andrew@...n.ch>
Andrew
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