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Message-ID: <46352f42-b099-4c50-a5ef-9248ed021b0a@lunn.ch>
Date: Sun, 11 Aug 2024 17:39:28 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Parthiban Veerasooran <Parthiban.Veerasooran@...rochip.com>
Cc: davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org,
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Subject: Re: [PATCH net-next v5 04/14] net: ethernet: oa_tc6: implement
software reset
On Tue, Jul 30, 2024 at 09:38:56AM +0530, Parthiban Veerasooran wrote:
> Reset complete bit is set when the MAC-PHY reset completes and ready for
> configuration. Additionally reset complete bit in the STS0 register has
> to be written by one upon reset complete to clear the interrupt.
>
> Signed-off-by: Parthiban Veerasooran <Parthiban.Veerasooran@...rochip.com>
Reviewed-by: Andrew Lunn <andrew@...n.ch>
Andrew
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