Message-ID: <05d1af7a-0bea-464f-a551-3fd8bf5ea9d5@collabora.com>
Date: Tue, 13 Aug 2024 17:49:06 +0300
From: Cristian Ciocaltea <cristian.ciocaltea@...labora.com>
To: Heiko Stübner <heiko@...ech.de>,
 Andrzej Hajda <andrzej.hajda@...el.com>,
 Neil Armstrong <neil.armstrong@...aro.org>, Robert Foss <rfoss@...nel.org>,
 Laurent Pinchart <Laurent.pinchart@...asonboard.com>,
 Jonas Karlman <jonas@...boo.se>, Jernej Skrabec <jernej.skrabec@...il.com>,
 Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
 Maxime Ripard <mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>,
 David Airlie <airlied@...il.com>, Daniel Vetter <daniel@...ll.ch>,
 Sandy Huang <hjc@...k-chips.com>, Andy Yan <andy.yan@...k-chips.com>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Mark Yao <markyao0591@...il.com>,
 Sascha Hauer <s.hauer@...gutronix.de>
Cc: dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-rockchip@...ts.infradead.org,
 devicetree@...r.kernel.org, kernel@...labora.com,
 Alexandre ARNOUD <aarnoud@...com>, Luis de Arquer <ldearquer@...il.com>,
 Algea Cao <algea.cao@...k-chips.com>
Subject: Re: [PATCH v3 0/5] Add initial support for the Rockchip RK3588 HDMI
 TX Controller

On 8/13/24 4:17 PM, Heiko Stübner wrote:
> Am Mittwoch, 7. August 2024, 13:07:22 CEST schrieb Cristian Ciocaltea:
>> The Rockchip RK3588 SoC family integrates the Synopsys DesignWare HDMI
>> 2.1 Quad-Pixel (QP) TX controller, which is a new IP block, quite
>> different from those used in the previous generations of Rockchip SoCs.
>>
>> The controller supports the following features, among others:
>>
>> * Fixed Rate Link (FRL)
>> * Display Stream Compression (DSC)
>> * 4K@...Hz and 8K@...z video modes
>> * Variable Refresh Rate (VRR) including Quick Media Switching (QMS)
>> * Fast Vactive (FVA)
>> * SCDC I2C DDC access
>> * Multi-stream audio
>> * Enhanced Audio Return Channel (EARC)
>>
>> This is the last component that needs to be supported in order to enable
>> the HDMI output functionality on the RK3588 based SBCs, such as the
>> RADXA Rock 5B.  The other components are the Video Output Processor
>> (VOP2) and the Samsung IP based HDMI/eDP TX Combo PHY, for which basic
>> support has been already made available via [1] and [2], respectively.
>>
>> Please note this is a reworked version of the original series, which
>> relied on a commonized dw-hdmi approach.  Since the general consensus
>> was to handle it as an entirely new IP, I dropped all patches related to
>> the old dw-hdmi and Rockchip glue code - a few of them might still make
>> sense as general improvements and will be submitted separately.
>>
>> It's worth mentioning the HDMI output support is currently limited to
>> RGB output up to 4K@...z, without audio, CEC or any of the HDMI 2.1
>> specific features.  Moreover, the VOP2 driver is not able to properly
>> handle all display modes supported by the connected screens, e.g. it
>> doesn't cope with non-integer refresh rates.
>>
>> A possible workaround consists of enabling the display controller to
>> make use of the clock provided by the HDMI PHY PLL.  This is still work
>> in progress and will be submitted later, as well as the required DTS
>> updates.
>>
>> To facilitate testing and experimentation, all HDMI output related
>> patches, including those part of this series, are available at [3].
>>
>> So far I could only verify this on the RADXA Rock 5B board.
> 
> On a rk3588-tiger-haikou (including its DSI hat and my preliminary DSI
> driver) it also works.
> 
> Even with both DSI and HDMI at the same time. Both hdmi plugged in on
> boot and also plugging it in during runtime of the board, generates a
> clean image on my 1080p display.
> 
> So, series
> Tested-by: Heiko Stuebner <heiko@...ech.de>

Thanks for checking this out!

Regards,
Cristian

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