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Message-ID: <CAMi1Hd04z56++7cj+w4=fyi2ov42OO6mAnDbkw5CehJw+fJ8ww@mail.gmail.com>
Date: Wed, 14 Aug 2024 22:52:19 +0530
From: Amit Pundir <amit.pundir@...aro.org>
To: manivannan.sadhasivam@...aro.org
Cc: Alim Akhtar <alim.akhtar@...sung.com>, Avri Altman <avri.altman@....com>, 
	Bart Van Assche <bvanassche@....org>, 
	"James E.J. Bottomley" <James.Bottomley@...senpartnership.com>, 
	"Martin K. Petersen" <martin.petersen@...cle.com>, linux-scsi@...r.kernel.org, 
	linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org, 
	Kyoungrul Kim <k831.kim@...sung.com>
Subject: Re: [PATCH 0/3] ufs: qcom: Fix probe failure on SM8550 SoC due to
 broken SDBS field

On Wed, 14 Aug 2024 at 22:45, Manivannan Sadhasivam via B4 Relay
<devnull+manivannan.sadhasivam.linaro.org@...nel.org> wrote:
>
> Hi,
>
> This series fixes the probe failure on the Qcom SM8550 SoC due to the broken
> SDBS field in the host controller capabilities register.
>
> Please consider this series for v6.11 as it fixes a regression.

Thank you Mani. This series fixes the UFS regression reported on
SM8550-HDK with v6.11-rc2.

Tested-by: Amit Pundir <amit.pundir@...aro.org>

>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> ---
> Manivannan Sadhasivam (3):
>       ufs: core: Rename LSDB to SDBS to reflect the UFSHCI 4.0 spec
>       ufs: core: Add a quirk for handling broken SDBS field in controller capabilities register
>       ufs: qcom: Add UFSHCD_QUIRK_BROKEN_SDBS_CAP for SM8550 SoC
>
>  drivers/ufs/core/ufshcd.c   | 9 +++++----
>  drivers/ufs/host/ufs-qcom.c | 6 +++++-
>  include/ufs/ufshcd.h        | 9 ++++++++-
>  include/ufs/ufshci.h        | 2 +-
>  4 files changed, 19 insertions(+), 7 deletions(-)
> ---
> base-commit: 7c626ce4bae1ac14f60076d00eafe71af30450ba
> change-id: 20240814-ufs-bug-fix-4427fb01b860
>
> Best regards,
> --
> Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
>
>
>

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