[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20240814-anaerobic-unpainted-532b8b117b79@spud>
Date: Wed, 14 Aug 2024 14:59:11 +0100
From: Conor Dooley <conor@...nel.org>
To: Manikandan Muralidharan <manikandan.m@...rochip.com>
Cc: andrzej.hajda@...el.com, neil.armstrong@...aro.org, rfoss@...nel.org,
Laurent.pinchart@...asonboard.com, jonas@...boo.se,
jernej.skrabec@...il.com, airlied@...il.com, daniel@...ll.ch,
maarten.lankhorst@...ux.intel.com, mripard@...nel.org,
tzimmermann@...e.de, robh@...nel.org, krzk+dt@...nel.org,
conor+dt@...nel.org, linux@...linux.org.uk,
nicolas.ferre@...rochip.com, alexandre.belloni@...tlin.com,
claudiu.beznea@...on.dev, arnd@...db.de, geert+renesas@...der.be,
mpe@...erman.id.au, rdunlap@...radead.org, dharma.b@...rochip.com,
dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v3 1/4] dt-bindings: display: bridge: add
sam9x75-mipi-dsi binding
On Wed, Aug 14, 2024 at 04:22:53PM +0530, Manikandan Muralidharan wrote:
> Add the 'sam9x75-mipi-dsi' compatible binding, which describes the
> Microchip's specific wrapper for the Synopsys DesignWare MIPI DSI HOST
> Controller for the sam9x75 series System-on-Chip (SoC) devices.
>
> Signed-off-by: Manikandan Muralidharan <manikandan.m@...rochip.com>
> ---
> changes in v3:
> - Describe the clocks used
>
> changes in v2:
> - List the clocks with description
> - remove describing 'remove-endpoint' properties
> - remove unused label, node and fix example DT indentation
> - cosmetic fixes
> ---
> .../bridge/microchip,sam9x75-mipi-dsi.yaml | 116 ++++++++++++++++++
> 1 file changed, 116 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/bridge/microchip,sam9x75-mipi-dsi.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/bridge/microchip,sam9x75-mipi-dsi.yaml b/Documentation/devicetree/bindings/display/bridge/microchip,sam9x75-mipi-dsi.yaml
> new file mode 100644
> index 000000000000..3c86f0cd49e9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/bridge/microchip,sam9x75-mipi-dsi.yaml
> @@ -0,0 +1,116 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/bridge/microchip,sam9x75-mipi-dsi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Microchip SAM9X75 MIPI DSI Controller
> +
> +maintainers:
> + - Manikandan Muralidharan <manikandan.m@...rochip.com>
> +
> +description:
> + Microchip specific extensions or wrapper to the Synopsys Designware MIPI DSI.
> + The MIPI Display Serial Interface (DSI) Host Controller implements all
> + protocol functions defined in the MIPI DSI Specification.The DSI Host
> + provides an interface between the LCD Controller (LCDC) and the MIPI D-PHY,
> + allowing communication with a DSI-compliant display.
> +
> +allOf:
> + - $ref: /schemas/display/dsi-controller.yaml#
> +
> +properties:
> + compatible:
> + const: microchip,sam9x75-mipi-dsi
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + items:
> + - description:
> + Peripheral Bus Clock between LCDC and MIPI DPHY
> + - description:
> + MIPI DPHY Interface reference clock for PLL block
> +
> + clock-names:
> + items:
> + - const: pclk
> + - const: refclk
> +
> + microchip,sfr:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description:
> + phandle to Special Function Register (SFR) node.To enable the DSI/CSI
> + selection bit in SFR's ISS Configuration Register.
I'm curious - why is this phandle required? How many SFR nodes are there
on the platform?
Download attachment "signature.asc" of type "application/pgp-signature" (229 bytes)
Powered by blists - more mailing lists