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Message-ID: <8734n5mzce.ffs@tglx>
Date: Thu, 15 Aug 2024 20:10:25 +0200
From: Thomas Gleixner <tglx@...utronix.de>
To: Palmer Dabbelt <palmer@...belt.com>
Cc: Renner Berthing <emil.renner.berthing@...onical.com>,
 linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
 apatel@...tanamicro.com, Paul Walmsley <paul.walmsley@...ive.com>,
 samuel.holland@...ive.com, aou@...s.berkeley.edu,
 daniel.lezcano@...aro.org
Subject: Re: [PATCH v1 0/9] Fix Allwinner D1 boot regression

On Thu, Aug 15 2024 at 10:51, Palmer Dabbelt wrote:
> On Wed, 14 Aug 2024 10:30:48 PDT (-0700), tglx@...utronix.de wrote:
>> I'm very much inclined to take the reverts right now, send them to Linus
>> for -rc5 tagged with cc: stable and ignore/nak any irqchip related riscv
>> patches until the next merge window is over.
>
> Acked-by: Palmer Dabbelt <palmer@...osinc.com>
>
> if you want to take the revert.

I'm happy to wait a week and see whether someone gets that CLINT hack
working or as I suggested the D1 PLIC early probe quirk.

> IIUC the patch above doesn't actually fix it, that's what led to just 
> sending the reverts -- at least reverts are better than breaking users.  
> I'll post over there too...

Right. We figured that out by now :)

> And it's no big deal if we're in the doghouse for a bit.  Regressions 
> should get fixed faster than this, so we deserve it.

For a week I consider you probationers :)

> Probably also another sign we're way too focused on getting new features 
> merged, as that's coming at the expense of making existing platforms 
> work.  IMO we've been way too focused on getting support for specs that 
> don't even have implementations, and not enough on building real working 
> systems.

RISCV is not alone with that. This whole industry is nuts about features
and forgets the stuff what matters.

Thanks,

        tglx

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