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Message-ID: <59503540293f6d640809e24b43ea5102b3119853.camel@mediatek.com>
Date: Tue, 20 Aug 2024 05:56:54 +0000
From: Peter Wang (王信友) <peter.wang@...iatek.com>
To: "mary@...y.zone" <mary@...y.zone>, "manisadhasivam.linux@...il.com"
	<manisadhasivam.linux@...il.com>
CC: "linux-scsi@...r.kernel.org" <linux-scsi@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"chu.stanley@...il.com" <chu.stanley@...il.com>,
	"James.Bottomley@...senpartnership.com"
	<James.Bottomley@...senpartnership.com>, "martin.petersen@...cle.com"
	<martin.petersen@...cle.com>, "angelogioacchino.delregno@...labora.com"
	<angelogioacchino.delregno@...labora.com>, "matthias.bgg@...il.com"
	<matthias.bgg@...il.com>
Subject: Re: [PATCH 1/1] scsi: ufs-mediatek: Add UFSHCD_QUIRK_BROKEN_LSDBS_CAP

On Mon, 2024-08-19 at 20:17 +0200, Mary Guillemard wrote:
>  	 
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
>  On Mon, Aug 19, 2024 at 05:38:52PM +0530, Manivannan Sadhasivam
> wrote:
> > On Mon, Aug 19, 2024 at 12:24:42AM +0200, Mary Guillemard wrote:
> > > MT8183 supports UFSHCI 2.1 spec, but report a bogus value of 1 in
> the
> > > reserved part for the Legacy Single Doorbell Support (LSDBS)
> capability.
> > > 
> > 
> > Wow... I never thought that this quirk will be used outside of Qcom
> SoCs...
> >
> 
> Yeah I found that by trial and error some weeks ago and noticed your
> serie while looking to upstream this change, quite funny to see other
> vendors having the same quirk here.
>  
> > > This set UFSHCD_QUIRK_BROKEN_LSDBS_CAP when MCQ support is
> explicitly
> > > disabled, allowing the device to be properly registered.
> > > 
> > > Signed-off-by: Mary Guillemard <mary@...y.zone>
> > > ---
> > >  drivers/ufs/host/ufs-mediatek.c | 3 +++
> > >  1 file changed, 3 insertions(+)
> > > 
> > > diff --git a/drivers/ufs/host/ufs-mediatek.c
> b/drivers/ufs/host/ufs-mediatek.c
> > > index 02c9064284e1..9a5919434c4e 100644
> > > --- a/drivers/ufs/host/ufs-mediatek.c
> > > +++ b/drivers/ufs/host/ufs-mediatek.c
> > > @@ -1026,6 +1026,9 @@ static int ufs_mtk_init(struct ufs_hba
> *hba)
> > >  if (host->caps & UFS_MTK_CAP_DISABLE_AH8)
> > >  hba->caps |= UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
> > >  
> > > +if (host->caps & UFS_MTK_CAP_DISABLE_MCQ)
> > 
> > How can this be the deciding factor? You said above that the issue
> is with
> > MT8183 SoC. So why not just use the quirk only for that platform?
> > 
> > - Mani
> >
> 
> So my current assumption is that it also affect other Mediatek SoCs
> that are also based on UFS 2.1 spec but I cannot check this.
> 
> Instead, we know that if MCQ isn't supported, we must fallback to
> LSDB
> as there is no other ways to drive the device.
> 
> UFS_MTK_CAP_DISABLE_MCQ (mediatek,ufs-disable-mcq) being unused
> upstream,
> I think that's an acceptable fix.
> 
> Another way to handle this would be to add a new dt property and add
> it
> to ufs_mtk_host_caps but I feel that my approach should be enough. 
> 

Hi Mary,

Yes, the MT8395 indeed requires the LSDBS flag, 
but not every MediaTek legacy chip does.
So setting the LSDBS flag here is appropriate.

Thanks.
Peter


> > > +hba->quirks |= UFSHCD_QUIRK_BROKEN_LSDBS_CAP;
> > > +
> > >  ufs_mtk_init_clocks(hba);
> > >  
> > >  /*
> > > -- 
> > > 2.46.0
> > > 
> > > 
> > 
> > -- 
> > மணிவண்ணன் சதாசிவம்
> 
> - Mary
> 

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