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Message-Id: <20240821085644.240009-6-prabhakar.mahadev-lad.rj@bp.renesas.com>
Date: Wed, 21 Aug 2024 09:56:41 +0100
From: Prabhakar <prabhakar.csengg@...il.com>
To: Geert Uytterhoeven <geert+renesas@...der.be>,
Magnus Damm <magnus.damm@...il.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-renesas-soc@...r.kernel.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Prabhakar <prabhakar.csengg@...il.com>,
Biju Das <biju.das.jz@...renesas.com>,
Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: [PATCH v3 5/8] arm64: dts: renesas: r9a09g057: Add SDHI0-SDHI2 nodes
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Add SDHI0-SDHI2 nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
---
v2->v3
- No change
v1->v2
- New patch
---
arch/arm64/boot/dts/renesas/r9a09g057.dtsi | 45 ++++++++++++++++++++++
1 file changed, 45 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
index eb36b3abc2d2..9103335ac583 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
@@ -420,6 +420,51 @@ gic: interrupt-controller@...00000 {
interrupt-controller;
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
};
+
+ sdhi0: mmc@...00000 {
+ compatible = "renesas,sdhi-r9a09g057";
+ reg = <0x0 0x15c00000 0 0x10000>;
+ interrupts = <GIC_SPI 735 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 736 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 163>,
+ <&cpg CPG_MOD 165>,
+ <&cpg CPG_MOD 164>,
+ <&cpg CPG_MOD 166>;
+ clock-names = "core", "clkh", "cd", "aclk";
+ resets = <&cpg 167>;
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
+ sdhi1: mmc@...10000 {
+ compatible = "renesas,sdhi-r9a09g057";
+ reg = <0x0 0x15c10000 0 0x10000>;
+ interrupts = <GIC_SPI 737 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 738 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 167>,
+ <&cpg CPG_MOD 169>,
+ <&cpg CPG_MOD 168>,
+ <&cpg CPG_MOD 170>;
+ clock-names = "core", "clkh", "cd", "aclk";
+ resets = <&cpg 168>;
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
+ sdhi2: mmc@...20000 {
+ compatible = "renesas,sdhi-r9a09g057";
+ reg = <0x0 0x15c20000 0 0x10000>;
+ interrupts = <GIC_SPI 739 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 740 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 171>,
+ <&cpg CPG_MOD 173>,
+ <&cpg CPG_MOD 172>,
+ <&cpg CPG_MOD 174>;
+ clock-names = "core", "clkh", "cd", "aclk";
+ resets = <&cpg 169>;
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
};
timer {
--
2.34.1
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