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Message-Id: <20240822152801.602318-15-claudiu.beznea.uj@bp.renesas.com>
Date: Thu, 22 Aug 2024 18:27:59 +0300
From: Claudiu <claudiu.beznea@...on.dev>
To: vkoul@...nel.org,
kishon@...nel.org,
robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
p.zabel@...gutronix.de,
geert+renesas@...der.be,
magnus.damm@...il.com,
gregkh@...uxfoundation.org,
mturquette@...libre.com,
sboyd@...nel.org,
yoshihiro.shimoda.uh@...esas.com,
biju.das.jz@...renesas.com,
ulf.hansson@...aro.org
Cc: linux-phy@...ts.infradead.org,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
linux-renesas-soc@...r.kernel.org,
linux-usb@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-clk@...r.kernel.org,
linux-pm@...r.kernel.org,
claudiu.beznea@...on.dev,
Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
Subject: [PATCH 14/16] arm64: dts: renesas: r9a08g045: Add USB support
From: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
Add USB nodes for the Renesas RZ/G3S SoC. This consists of PHY reset,
host and device support.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
---
arch/arm64/boot/dts/renesas/r9a08g045.dtsi | 119 +++++++++++++++++++++
1 file changed, 119 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi
index cd7cefdb2bab..c6c279dffccf 100644
--- a/arch/arm64/boot/dts/renesas/r9a08g045.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a08g045.dtsi
@@ -7,6 +7,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/r9a08g045-cpg.h>
+#include <dt-bindings/reset/renesas,r9a08g045-sysc.h>
/ {
compatible = "renesas,r9a08g045";
@@ -265,6 +266,124 @@ eth1: ethernet@...40000 {
status = "disabled";
};
+ phyrst: usbphy-ctrl@...00000 {
+ compatible = "renesas,r9a08g045-usbphy-ctrl";
+ reg = <0 0x11e00000 0 0x10000>;
+ clocks = <&cpg CPG_MOD R9A08G045_USB_PCLK>;
+ resets = <&cpg R9A08G045_USB_PRESETN>,
+ <&sysc R9A08G045_SYSC_RESET_USB>;
+ power-domains = <&cpg>;
+ #reset-cells = <1>;
+ status = "disabled";
+
+ usb0_vbus_otg: regulator-vbus {
+ regulator-name = "vbus";
+ };
+ };
+
+ ohci0: usb@...10000 {
+ compatible = "generic-ohci";
+ reg = <0 0x11e10000 0 0x100>;
+ interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A08G045_USB_PCLK>,
+ <&cpg CPG_MOD R9A08G045_USB_U2H0_HCLK>;
+ resets = <&phyrst 0>,
+ <&cpg R9A08G045_USB_U2H0_HRESETN>;
+ phys = <&usb2_phy0 1>;
+ phy-names = "usb";
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
+ ehci0: usb@...10100 {
+ compatible = "generic-ehci";
+ reg = <0 0x11e10100 0 0x100>;
+ interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A08G045_USB_PCLK>,
+ <&cpg CPG_MOD R9A08G045_USB_U2H0_HCLK>;
+ resets = <&phyrst 0>,
+ <&cpg R9A08G045_USB_U2H0_HRESETN>;
+ phys = <&usb2_phy0 2>;
+ phy-names = "usb";
+ companion = <&ohci0>;
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
+ usb2_phy0: usb-phy@...10200 {
+ compatible = "renesas,usb2-phy-r9a08g045";
+ reg = <0 0x11e10200 0 0x700>;
+ interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A08G045_USB_PCLK>,
+ <&cpg CPG_MOD R9A08G045_USB_U2H0_HCLK>;
+ resets = <&phyrst 0>,
+ <&cpg R9A08G045_USB_U2H0_HRESETN>;
+ #phy-cells = <1>;
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
+ hsusb: usb@...20000 {
+ compatible = "renesas,usbhs-r9a08g045",
+ "renesas,rzg2l-usbhs";
+ reg = <0 0x11e20000 0 0x10000>;
+ interrupts = <GIC_SPI 85 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A08G045_USB_PCLK>,
+ <&cpg CPG_MOD R9A08G045_USB_U2P_EXR_CPUCLK>;
+ resets = <&phyrst 0>,
+ <&cpg R9A08G045_USB_U2P_EXL_SYSRST>;
+ renesas,buswait = <7>;
+ phys = <&usb2_phy0 3>;
+ phy-names = "usb";
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
+ ohci1: usb@...30000 {
+ compatible = "generic-ohci";
+ reg = <0 0x11e30000 0 0x100>;
+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A08G045_USB_PCLK>,
+ <&cpg CPG_MOD R9A08G045_USB_U2H1_HCLK>;
+ resets = <&phyrst 1>,
+ <&cpg R9A08G045_USB_U2H1_HRESETN>;
+ phys = <&usb2_phy1 1>;
+ phy-names = "usb";
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
+ ehci1: usb@...30100 {
+ compatible = "generic-ehci";
+ reg = <0 0x11e30100 0 0x100>;
+ interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A08G045_USB_PCLK>,
+ <&cpg CPG_MOD R9A08G045_USB_U2H1_HCLK>;
+ resets = <&phyrst 1>,
+ <&cpg R9A08G045_USB_U2H1_HRESETN>;
+ phys = <&usb2_phy1 2>;
+ phy-names = "usb";
+ companion = <&ohci1>;
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
+ usb2_phy1: usb-phy@...30200 {
+ compatible = "renesas,usb2-phy-r9a08g045";
+ reg = <0 0x11e30200 0 0x700>;
+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A08G045_USB_PCLK>,
+ <&cpg CPG_MOD R9A08G045_USB_U2H1_HCLK>;
+ resets = <&phyrst 1>,
+ <&cpg R9A08G045_USB_U2H1_HRESETN>;
+ #phy-cells = <1>;
+ power-domains = <&cpg>;
+ status = "disabled";
+ };
+
gic: interrupt-controller@...00000 {
compatible = "arm,gic-v3";
#interrupt-cells = <3>;
--
2.39.2
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