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Message-ID: <20240826161149.2hnfpjslsdyezn72@bryanbrattlof.com>
Date: Mon, 26 Aug 2024 11:11:49 -0500
From: Bryan Brattlof <bb@...com>
To: Dhruva Gole <d-gole@...com>
CC: Nishanth Menon <nm@...com>, Vignesh Raghavendra <vigneshr@...com>,
        Tero
 Kristo <kristo@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof
 Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        <linux-arm-kernel@...ts.infradead.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 3/4] arm64: dts: ti: k3-am62p: add opp frequencies

On August 26, 2024 thus sayeth Dhruva Gole:
> Hi Bryan,
> 
> On Aug 23, 2024 at 16:54:30 -0500, Bryan Brattlof wrote:
> > ONe power management technique available to the Cortex-A53s is their
> 
> s/ONe/One
> 
> > ability to dynamically scale their frequency across the device's
> > Operating Performance Points (OPP)
> > 
> > The OPPs available for the Cortex-A53s on the AM62Px can vary based on
> > the silicon variant used. The SoC variant is encoded into the
> > WKUP_MMR0_WKUP0_CTRL_MMR0_JTAG_USER_ID register which is used to limit
> > the OPP entries the SoC supports. A table of all these variants can be
> > found in its data sheet[0] for the AM62Px processor family.
> 
> Error 404! Not found [0] ;)
> 

Oops. I'll fix these up

> > 
> > Add the OPP table into the SoC's ftdi file along with the syscon node to
> 
> What is ftdi?

FTDI is a chip, what I tried to type out was fdti or Flattened Device 
Tree Includes :)

> 
> > describe the WKUP_MMR0_WKUP0_CTRL_MMR0_JTAG_USER_ID register to detect
> > the SoC variant.
> > 
> > Signed-off-by: Bryan Brattlof <bb@...com>
> > ---
> >  .../boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi  |  5 +++
> >  arch/arm64/boot/dts/ti/k3-am62p5.dtsi              | 47 ++++++++++++++++++++++
> >  2 files changed, 52 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi
> > index 315d0092e7366..6f32135f00a55 100644
> > --- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi
> > +++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi
> > @@ -20,6 +20,11 @@ chipid: chipid@14 {
> >  			bootph-all;
> >  		};
> >  
> > +		opp_efuse_table: syscon@18 {
> > +			compatible = "ti,am62-opp-efuse-table", "syscon";
> 
> Huh, curious why I don't see this particular compatible in am62 itself..
> Also, I am still not clear where this discussion got left off: (If it's
> related)
> https://lore.kernel.org/all/5chxjwybmsxq73pagtlw4zr2asbtxov7ezrpn5j37cr77bmepa@fejdlxomfgae/
> 
> In AM625, I see
> k3-am625.dtsi:111: col 14: syscon = <&wkup_conf>;
> 
> But the approach you've used here seems different. Is there a
> justification given on which one should be used/why somewhere that I can
> refer?

Labeling the entire &wkup_conf as a syscon node is kinda abusing what 
the syscon node is used for. There are a lot of things inside that 
WKUP_CTRL_MMR that do not belong under the miscellaneous registers 
category. For the 62A and 62P we've chosen to label &wkup_conf as a bus 
with little syscon sub-nodes inside of it.  

I don't think the discussion[0] ever finalized but we started going that 
direction with new SoCs, looks like the older SoCs never received the 
cleanup.

~Bryan

[0] https://lore.kernel.org/all/e7114cb4-e24f-4e78-a89f-4e2e2e704b8a@ti.com/


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