linux-kernel - Re: [PATCH v3 3/8] arm64: dts: renesas: r9a09g057: Add OSTM0-OSTM7 nodes

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Message-ID: <CAMuHMdUYYPj6JD-aLkriYB59OnHir_ec=xLo7fUbASggKetfpw@mail.gmail.com>
Date: Mon, 26 Aug 2024 14:14:29 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Prabhakar <prabhakar.csengg@...il.com>
Cc: Magnus Damm <magnus.damm@...il.com>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org, Biju Das <biju.das.jz@...renesas.com>, 
	Fabrizio Castro <fabrizio.castro.jz@...esas.com>, 
	Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH v3 3/8] arm64: dts: renesas: r9a09g057: Add OSTM0-OSTM7 nodes

Hi Prabhakar,

On Wed, Aug 21, 2024 at 10:56 AM Prabhakar <prabhakar.csengg@...il.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
>
> Add OSTM0-OSTM7 nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> ---
> v2->v3
> - Grouped the OSTM nodes

Thanks for the update!

> --- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> @@ -121,6 +121,86 @@ sys: system-controller@...30000 {
>                         status = "disabled";
>                 };
>
> +               ostm0: timer@...00000 {
> +                       compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
> +                       reg = <0x0 0x11800000 0x0 0x1000>;
> +                       interrupts = <GIC_SPI 17 IRQ_TYPE_EDGE_RISING>;
> +                       clocks = <&cpg CPG_MOD 67>;
> +                       resets = <&cpg 109>;
> +                       power-domains = <&cpg>;
> +                       status = "disabled";
> +               };
> +
> +               ostm1: timer@...01000 {
> +                       compatible = "renesas,r9a09g057-ostm", "renesas,ostm";
> +                       reg = <0x0 0x11801000 0x0 0x1000>;
> +                       interrupts = <GIC_SPI 18 IRQ_TYPE_EDGE_RISING>;
> +                       clocks = <&cpg CPG_MOD 68>;
> +                       resets = <&cpg 110>;
> +                       power-domains = <&cpg>;
> +                       status = "disabled";
> +               };
> +
> +               ostm4: timer@...00000 {

Usually we sort the instances within a group by instance number, i.e.

    ostm0: timer@...00000 {
    ostm1: timer@...01000 {
    ostm2: timer@...00000 {
    ostm3: timer@...01000 {
    ostm4: timer@...00000 {
    ostm5: timer@...01000 {
    ostm6: timer@...02000 {
    ostm7: timer@...03000 {

See e.g. the scif nodes in arch/arm64/boot/dts/renesas/r8a77951.dtsi:

    scif0: serial@...60000 {
    scif1: serial@...68000 {
    scif2: serial@...88000 {
    scif3: serial@...50000 {
    scif4: serial@...40000 {
    scif5: serial@...30000 {

scif3 and scif4 have lower base addresses than scif0.

The rest LGTM.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds