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Message-ID: <CAMuHMdVun6ZW95wRFo6wyZWAg9Y6KZ9Ot7j3Jo__uDtJFZDgdw@mail.gmail.com>
Date: Mon, 26 Aug 2024 14:20:08 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Prabhakar <prabhakar.csengg@...il.com>
Cc: Magnus Damm <magnus.damm@...il.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, Biju Das <biju.das.jz@...renesas.com>,
Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH v3 5/8] arm64: dts: renesas: r9a09g057: Add SDHI0-SDHI2 nodes
Hi Prabhakar,
On Wed, Aug 21, 2024 at 10:56 AM Prabhakar <prabhakar.csengg@...il.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
>
> Add SDHI0-SDHI2 nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Thanks for your patch!
> --- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
> @@ -420,6 +420,51 @@ gic: interrupt-controller@...00000 {
> interrupt-controller;
> interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
> };
> +
> + sdhi0: mmc@...00000 {
> + compatible = "renesas,sdhi-r9a09g057";
> + reg = <0x0 0x15c00000 0 0x10000>;
> + interrupts = <GIC_SPI 735 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 736 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 163>,
> + <&cpg CPG_MOD 165>,
> + <&cpg CPG_MOD 164>,
> + <&cpg CPG_MOD 166>;
> + clock-names = "core", "clkh", "cd", "aclk";
> + resets = <&cpg 167>;
With all module clock and reset numbers HEXed:
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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