linux-kernel - RE: [PATCH v7 1/2] clk: starfive: jh7110-sys: Add notifier for PLL0 clock

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Message-ID:
 <ZQ2PR01MB13074B9722255366B9C8F946E6942@ZQ2PR01MB1307.CHNPR01.prod.partner.outlook.cn>
Date: Tue, 27 Aug 2024 05:49:36 +0000
From: Hal Feng <hal.feng@...rfivetech.com>
To: Xingyu Wu <xingyu.wu@...rfivetech.com>, Michael Turquette
	<mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, Conor Dooley
	<conor@...nel.org>, Emil Renner Berthing <emil.renner.berthing@...onical.com>
CC: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>
Subject: RE: [PATCH v7 1/2] clk: starfive: jh7110-sys: Add notifier for PLL0
 clock

> On 26.08.24 16:04, Xingyu Wu wrote:
> Add notifier function for PLL0 clock. In the function, the cpu_root clock should
> be operated by saving its current parent and setting a new safe parent (osc
> clock) before setting the PLL0 clock rate. After setting PLL0 rate, it should be
> switched back to the original parent clock.
> 
> Fixes: e2c510d6d630 ("riscv: dts: starfive: Add cpu scaling for JH7110 SoC")
> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@...onical.com>
> Signed-off-by: Xingyu Wu <xingyu.wu@...rfivetech.com>

Reviewed-by: Hal Feng <hal.feng@...rfivetech.com>