linux-kernel - Re: [PATCH v7 1/2] clk: starfive: jh7110-sys: Add notifier for PLL0 clock

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Message-ID: <ba3077ef4b155649812fd8be75f131e7.sboyd@kernel.org>
Date: Wed, 28 Aug 2024 13:19:23 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: Conor Dooley <conor@...nel.org>, Emil Renner Berthing <emil.renner.berthing@...onical.com>, Michael Turquette <mturquette@...libre.com>, Xingyu Wu <xingyu.wu@...rfivetech.com>
Cc: Hal Feng <hal.feng@...rfivetech.com>, Xingyu Wu <xingyu.wu@...rfivetech.com>, linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org
Subject: Re: [PATCH v7 1/2] clk: starfive: jh7110-sys: Add notifier for PLL0 clock

Quoting Xingyu Wu (2024-08-26 01:04:29)
> Add notifier function for PLL0 clock. In the function, the cpu_root clock
> should be operated by saving its current parent and setting a new safe
> parent (osc clock) before setting the PLL0 clock rate. After setting PLL0
> rate, it should be switched back to the original parent clock.
> 
> Fixes: e2c510d6d630 ("riscv: dts: starfive: Add cpu scaling for JH7110 SoC")
> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@...onical.com>
> Signed-off-by: Xingyu Wu <xingyu.wu@...rfivetech.com>
> ---

What is the urgency of this patch? I can't tell from the commit text, so
I'm assuming it can bake in clk-next for a few weeks.