linux-kernel - [PATCH 03/11] x86/cpufeatures: add X86_FEATURE_WORKLOAD

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Message-ID: <067b306ea3457091d5ac97b0cc5b41fcadac10d2.1724748733.git.perry.yuan@amd.com>
Date: Tue, 27 Aug 2024 17:36:51 +0800
From: Perry Yuan <perry.yuan@....com>
To: <hdegoede@...hat.com>, <ilpo.jarvinen@...ux.intel.com>,
	<Mario.Limonciello@....com>, <Borislav.Petkov@....com>,
	<kprateek.nayak@....com>
CC: <Alexander.Deucher@....com>, <Xinmei.Huang@....com>,
	<bharathprabhu.perdoor@....com>, <poonam.aggrwal@....com>, <Li.Meng@....com>,
	<platform-driver-x86@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	<Xiaojian.Du@....com>
Subject: [PATCH 03/11] x86/cpufeatures: add X86_FEATURE_WORKLOAD_CLASS feature bit

Add new feature bit that indicates support for workload based
heuristic feedback to OS for scheduling decisions.
When the bit set, threads are classified during runtime into
enumerated classes. The classes represent thread performance/power
characteristics that may benefit from special scheduling behaviors.

Signed-off-by: Perry Yuan <perry.yuan@....com>
---
 arch/x86/include/asm/cpufeatures.h | 1 +
 arch/x86/kernel/cpu/scattered.c    | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 2975209594cc..10e97c29216d 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -473,6 +473,7 @@
 #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* "" Clear branch history at vmexit using SW loop */
 #define X86_FEATURE_FAST_CPPC		(21*32 + 5) /* "" AMD Fast CPPC */
 #define X86_FEATURE_HETERO_CORE_TOPOLOGY       (21*32+ 6) /* "" Heterogeneous Core Topology */
+#define X86_FEATURE_WORKLOAD_CLASS		(21*32+ 7) /* Workload Classification */
 
 /*
  * BUG word(s)
diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
index 3bba55323163..b6547bab9e23 100644
--- a/arch/x86/kernel/cpu/scattered.c
+++ b/arch/x86/kernel/cpu/scattered.c
@@ -49,6 +49,7 @@ static const struct cpuid_bit cpuid_bits[] = {
 	{ X86_FEATURE_MBA,		CPUID_EBX,  6, 0x80000008, 0 },
 	{ X86_FEATURE_SMBA,		CPUID_EBX,  2, 0x80000020, 0 },
 	{ X86_FEATURE_BMEC,		CPUID_EBX,  3, 0x80000020, 0 },
+	{ X86_FEATURE_WORKLOAD_CLASS,   CPUID_EAX,  22, 0x80000021, 0 },
 	{ X86_FEATURE_PERFMON_V2,	CPUID_EAX,  0, 0x80000022, 0 },
 	{ X86_FEATURE_AMD_LBR_V2,	CPUID_EAX,  1, 0x80000022, 0 },
 	{ X86_FEATURE_AMD_LBR_PMC_FREEZE,	CPUID_EAX,  2, 0x80000022, 0 },
-- 
2.34.1