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Message-ID: <38cf9a8f-97cb-41a4-aac2-4c9f61a90dd7@linux.intel.com>
Date: Tue, 27 Aug 2024 08:41:19 +0800
From: "Mi, Dapeng" <dapeng1.mi@...ux.intel.com>
To: Jim Mattson <jmattson@...gle.com>
Cc: Sean Christopherson <seanjc@...gle.com>,
 Paolo Bonzini <pbonzini@...hat.com>, kvm@...r.kernel.org,
 linux-kernel@...r.kernel.org, Mingwei Zhang <mizhang@...gle.com>,
 Xiong Zhang <xiong.y.zhang@...el.com>, Zhenyu Wang
 <zhenyuw@...ux.intel.com>, Like Xu <like.xu.linux@...il.com>,
 Jinrong Liang <cloudliang@...cent.com>, Dapeng Mi <dapeng1.mi@...el.com>
Subject: Re: [Patch v5 06/18] x86: pmu: Add asserts to warn inconsistent fixed
 events and counters


On 8/27/2024 2:36 AM, Jim Mattson wrote:
> On Sun, Aug 25, 2024 at 11:56 PM Mi, Dapeng <dapeng1.mi@...ux.intel.com> wrote:
>>
>> On 8/23/2024 2:22 AM, Jim Mattson wrote:
>>> On Tue, Jul 2, 2024 at 7:12 PM Dapeng Mi <dapeng1.mi@...ux.intel.com> wrote:
>>>> Current PMU code deosn't check whether PMU fixed counter number is
>>>> larger than pre-defined fixed events. If so, it would cause memory
>>>> access out of range.
>>>>
>>>> So add assert to warn this invalid case.
>>>>
>>>> Reviewed-by: Mingwei Zhang <mizhang@...gle.com>
>>>> Signed-off-by: Dapeng Mi <dapeng1.mi@...ux.intel.com>
>>>> ---
>>>>  x86/pmu.c | 10 ++++++++--
>>>>  1 file changed, 8 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/x86/pmu.c b/x86/pmu.c
>>>> index b4de2680..3e0bf3a2 100644
>>>> --- a/x86/pmu.c
>>>> +++ b/x86/pmu.c
>>>> @@ -113,8 +113,12 @@ static struct pmu_event* get_counter_event(pmu_counter_t *cnt)
>>>>                 for (i = 0; i < gp_events_size; i++)
>>>>                         if (gp_events[i].unit_sel == (cnt->config & 0xffff))
>>>>                                 return &gp_events[i];
>>>> -       } else
>>>> -               return &fixed_events[cnt->ctr - MSR_CORE_PERF_FIXED_CTR0];
>>>> +       } else {
>>>> +               unsigned int idx = cnt->ctr - MSR_CORE_PERF_FIXED_CTR0;
>>>> +
>>>> +               assert(idx < ARRAY_SIZE(fixed_events));
>>> Won't this assertion result in a failure on bare metal, for CPUs
>>> supporting fixed counter 3?
>> Yes, this is intended use. Currently KVM vPMU still doesn't support fixed
>> counter 3. If it's supported in KVM vPMU one day but forget to add
>> corresponding support in this pmu test, this assert would remind this.
> These tests are supposed to run (and pass) on bare metal. Hence, they
> should not be dependent on a non-architectural quirk of the KVM
> implementation.
>
> Perhaps a warning would serve as a reminder?

Sounds reasonable. Would change to a warning. Thanks.


>
>>>> +               return &fixed_events[idx];
>>>> +       }
>>>>
>>>>         return (void*)0;
>>>>  }
>>>> @@ -740,6 +744,8 @@ int main(int ac, char **av)
>>>>         printf("Fixed counters:      %d\n", pmu.nr_fixed_counters);
>>>>         printf("Fixed counter width: %d\n", pmu.fixed_counter_width);
>>>>
>>>> +       assert(pmu.nr_fixed_counters <= ARRAY_SIZE(fixed_events));
>>>> +
>>> And this one as well?
>>>
>>>>         apic_write(APIC_LVTPC, PMI_VECTOR);
>>>>
>>>>         check_counters();
>>>> --
>>>> 2.40.1
>>>>

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