linux-kernel - Re: [PATCH 3/8] phy: qcom: qmp: Add phy register and clk setting for x1e80100 PCIe3

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Message-ID: <d79f84f1-345b-4099-b1d2-567ebfd3789d@quicinc.com>
Date: Wed, 28 Aug 2024 17:52:09 +0800
From: Qiang Yu <quic_qianyu@...cinc.com>
To: Krzysztof Kozlowski <krzk@...nel.org>
CC: <manivannan.sadhasivam@...aro.org>, <vkoul@...nel.org>,
        <kishon@...nel.org>, <robh@...nel.org>, <andersson@...nel.org>,
        <konradybcio@...nel.org>, <krzk+dt@...nel.org>, <conor+dt@...nel.org>,
        <mturquette@...libre.com>, <sboyd@...nel.org>, <abel.vesa@...aro.org>,
        <quic_msarkar@...cinc.com>, <quic_devipriy@...cinc.com>,
        <dmitry.baryshkov@...aro.org>, <kw@...ux.com>, <lpieralisi@...nel.org>,
        <neil.armstrong@...aro.org>, <linux-arm-msm@...r.kernel.org>,
        <linux-phy@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
        <linux-pci@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-clk@...r.kernel.org>
Subject: Re: [PATCH 3/8] phy: qcom: qmp: Add phy register and clk setting for
 x1e80100 PCIe3


On 8/27/2024 7:38 PM, Krzysztof Kozlowski wrote:
> On Mon, Aug 26, 2024 at 11:36:26PM -0700, Qiang Yu wrote:
>>   	if (cfg->tbls.ln_shrd)
>>   		qmp->ln_shrd = base + offs->ln_shrd;
>>   
>> @@ -4424,6 +4641,9 @@ static const struct of_device_id qmp_pcie_of_match_table[] = {
>>   	}, {
>>   		.compatible = "qcom,x1e80100-qmp-gen4x2-pcie-phy",
>>   		.data = &x1e80100_qmp_gen4x2_pciephy_cfg,
>> +	}, {
>> +		.compatible = "qcom,x1e80100-qmp-gen4x8-pcie-phy",
> Undocumented compatible or your patch order is wrong.
OK, will put the yaml patch in front of this patch

Thanks,
Qiang
>
>> +		.data = &x1e80100_qmp_gen4x8_pciephy_cfg,
>>   	},
> Best regards,
> Krzysztof
>