linux-kernel - Re: [PATCH v3 1/2] clk: qcom: dispcc-sc7180: Only park display clks at init

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Message-ID: <c1e35d3d-fa00-4453-aaa3-9f23a07acb4f@linaro.org>
Date: Thu, 29 Aug 2024 17:32:48 +0200
From: Neil Armstrong <neil.armstrong@...aro.org>
To: Stephen Boyd <swboyd@...omium.org>, Konrad Dybcio
 <konradybcio@...nel.org>, Bjorn Andersson <andersson@...nel.org>,
 Stephen Boyd <sboyd@...nel.org>
Cc: linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
 patches@...ts.linux.dev, linux-clk@...r.kernel.org,
 Amit Pundir <amit.pundir@...aro.org>, Taniya Das <quic_tdas@...cinc.com>
Subject: Re: [PATCH v3 1/2] clk: qcom: dispcc-sc7180: Only park display clks
 at init

Hi,

On 28/08/2024 19:17, Stephen Boyd wrote:
> Amit Pundir reports that audio and USB-C host mode stops working on
> sm8550 after commit 01a0a6cc8cfd ("clk: qcom: Park shared RCGs upon
> registration"). That's because the gcc_usb30_prim_master_clk_src clk is
> registered and clk_rcg2_shared_init() parks it on XO. Running USB at a
> slower speed than the link supports is effectively under-clocking the
> USB link and probably confusing the downstream USB devices.
> 
> We didn't need to change all the shared RCGs to park on XO at
> registration time in commit commit 01a0a6cc8cfd ("clk: qcom: Park shared
> RCGs upon registration"). Instead, we only needed to park the few
> display related clks on sc7180 to fix the issue.
> 
> Fix sm8550 (and likely other qcom SoCs) by skipping the parking part of
> clk_rcg2_shared_init(). Make that the default init clk_op for shared
> RCGs, but keep the part where we cache the config register as that's
> still necessary to figure out the true parent of the clk is. Introduce
> another set of clk_ops 'clk_rcg2_shared_init_park' that does what
> clk_rcg2_shared_init() was doing and use that for the display clks on
> sc7180. This fixes the sm8550 problem and limits the "park upon
> registration" logic to the display clks that need it.
> 
> Fixes: 01a0a6cc8cfd ("clk: qcom: Park shared RCGs upon registration")
> Cc: Konrad Dybcio <konradybcio@...nel.org>
> Cc: Bjorn Andersson <andersson@...nel.org>
> Cc: Taniya Das <quic_tdas@...cinc.com>
> Cc: Neil Armstrong <neil.armstrong@...aro.org>
> Reported-by: Amit Pundir <amit.pundir@...aro.org>
> Closes: https://lore.kernel.org/CAMi1Hd1KQBE4kKUdAn8E5FV+BiKzuv+8FoyWQrrTHPDoYTuhgA@mail.gmail.com
> Signed-off-by: Stephen Boyd <swboyd@...omium.org>
> ---
>   drivers/clk/qcom/clk-rcg.h       |  1 +
>   drivers/clk/qcom/clk-rcg2.c      | 36 +++++++++++++++++++++++++++++---
>   drivers/clk/qcom/dispcc-sc7180.c |  8 +++----
>   3 files changed, 38 insertions(+), 7 deletions(-)
> 
<snip>

I've been testing this serie on SM8650, and with 01a0a6cc8cfd ("clk: qcom: Park shared RCGs upon registration")
it fixes an issue we have that triggers:
[   18.740736] ------------[ cut here ]------------
[   18.745837] ufs_phy_gdsc status stuck at 'off'
[   18.745929] WARNING: CPU: 1 PID: 197 at drivers/clk/qcom/gdsc.c:178 gdsc_toggle_logic+0x15c/0x164
...
after waking up UFS from runtime suspend.

So I suspect we'll need to figure out which SM8650 GCC shared clocks would need
to use clk_rcg2_shared_init_park_ops ?

We also had random boot crash when initializing the display very late on multiple platforms,
and so far "clk: qcom: Park shared RCGs upon registration" fixed that, but I also suppose Ill
need to reflect the changes done to dispcc-sc7180.c to dispcc-sm8650.c and others.

Neil