linux-kernel - Re: [PATCH v4 4/4] riscv: dts: sophgo: Add LicheeRV Nano board device tree

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Message-ID:
 <MA0P287MB2822AC58BC43FDE03802E773FE972@MA0P287MB2822.INDP287.PROD.OUTLOOK.COM>
Date: Fri, 30 Aug 2024 08:37:28 +0800
From: Chen Wang <unicorn_wang@...look.com>
To: Inochi Amaoto <inochiama@...look.com>,
 Thomas Bonnefille <thomas.bonnefille@...tlin.com>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Paul Walmsley
 <paul.walmsley@...ive.com>, Chao Wei <chao.wei@...hgo.com>,
 Conor Dooley <conor@...nel.org>
Cc: Albert Ou <aou@...s.berkeley.edu>, Palmer Dabbelt <palmer@...belt.com>,
 Samuel Holland <samuel.holland@...ive.com>,
 Thomas Gleixner <tglx@...utronix.de>,
 Daniel Lezcano <daniel.lezcano@...aro.org>,
 Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
 Miquèl Raynal <miquel.raynal@...tlin.com>,
 linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
 linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v4 4/4] riscv: dts: sophgo: Add LicheeRV Nano board device
 tree


On 2024/8/29 13:52, Inochi Amaoto wrote:
> On Thu, Jul 11, 2024 at 12:01:31PM GMT, Thomas Bonnefille wrote:
>> LicheeRV Nano B [1] is an embedded development platform based on the SOPHGO
>> SG2002 chip, the B(ase) version is deprived of Wifi/Bluetooth and Ethernet.
>>
>> Add only support for UART and SDHCI.
>>
>> Link: https://wiki.sipeed.com/hardware/en/lichee/RV_Nano/1_intro.html [1]
>>
>> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@...tlin.com>
>> ---
>>   arch/riscv/boot/dts/sophgo/Makefile                |  1 +
>>   .../boot/dts/sophgo/sg2002-licheerv-nano-b.dts     | 54 ++++++++++++++++++++++
>>   2 files changed, 55 insertions(+)
>>
>> diff --git a/arch/riscv/boot/dts/sophgo/Makefile b/arch/riscv/boot/dts/sophgo/Makefile
>> index 57ad82a61ea6..47d4243a8f35 100644
>> --- a/arch/riscv/boot/dts/sophgo/Makefile
>> +++ b/arch/riscv/boot/dts/sophgo/Makefile
>> @@ -1,4 +1,5 @@
>>   # SPDX-License-Identifier: GPL-2.0
>>   dtb-$(CONFIG_ARCH_SOPHGO) += cv1800b-milkv-duo.dtb
>>   dtb-$(CONFIG_ARCH_SOPHGO) += cv1812h-huashan-pi.dtb
>> +dtb-$(CONFIG_ARCH_SOPHGO) += sg2002-licheerv-nano-b.dtb
>>   dtb-$(CONFIG_ARCH_SOPHGO) += sg2042-milkv-pioneer.dtb
>> diff --git a/arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts b/arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts
>> new file mode 100644
>> index 000000000000..fc98b6a0ddf7
>> --- /dev/null
>> +++ b/arch/riscv/boot/dts/sophgo/sg2002-licheerv-nano-b.dts
>> @@ -0,0 +1,54 @@
>> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
>> +/*
>> + * Copyright (C) 2024 Thomas Bonnefille <thomas.bonnefille@...tlin.com>
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "sg2002.dtsi"
>> +
>> +/ {
>> +	model = "LicheeRV Nano B";
>> +	compatible = "sipeed,licheerv-nano-b", "sipeed,licheerv-nano", "sophgo,sg2002";
>> +
>> +	aliases {
>> +		gpio0 = &gpio0;
>> +		gpio1 = &gpio1;
>> +		gpio2 = &gpio2;
>> +		gpio3 = &gpio3;
>> +		serial0 = &uart0;
>> +		serial1 = &uart1;
>> +		serial2 = &uart2;
>> +		serial3 = &uart3;
>> +		serial4 = &uart4;
>> +	};
>> +
>> +	chosen {
>> +		stdout-path = "serial0:115200n8";
>> +	};
>> +};
>> +
>> +&osc {
>> +	clock-frequency = <25000000>;
>> +};
>> +
>> +&sdhci0 {
>> +	status = "okay";
>> +	bus-width = <4>;
>> +	no-1-8-v;
>> +	no-mmc;
>> +	no-sdio;
>> +	disable-wp;
>> +};
>> +
>> +&uart0 {
>> +	status = "okay";
>> +};
>> +
>> +&uart1 {
>> +	status = "okay";
>> +};
>> +
>> +&i2c0 {
>> +	status = "okay";
>> +};
>>
>> -- 
>> 2.45.2
>>
> Have you test you patch with a real board? Especially
> for device "uart1" and "i2c0", I suspect your
> configuartion does not work by default.

Hi, Thomas Bonnefille,

Can you please double check and feedback, I want to confirm this before 
acking this change.

As you know, rc6 will come next week and I'm planning a pr next week.

Regards,

Chen