lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <79c735ca-008d-497b-bf5b-a21f6dcde796@linaro.org>
Date: Fri, 30 Aug 2024 10:11:22 +0200
From: Neil Armstrong <neil.armstrong@...aro.org>
To: Jerome Brunet <jbrunet@...libre.com>
Cc: xianwei.zhao@...ogic.com, Michael Turquette <mturquette@...libre.com>,
 Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Chuan Liu <chuan.liu@...ogic.com>,
 Kevin Hilman <khilman@...libre.com>,
 Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
 Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
 linux-amlogic@...ts.infradead.org, linux-clk@...r.kernel.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v4 1/3] dt-bindings: clock: fix C3 PLL input parameter

On 30/08/2024 10:10, Jerome Brunet wrote:
> On Fri 30 Aug 2024 at 10:00, Neil Armstrong <neil.armstrong@...aro.org> wrote:
> 
>> Hi Jerome,
>>
>> On 30/08/2024 07:26, Xianwei Zhao via B4 Relay wrote:
>>> From: Xianwei Zhao <xianwei.zhao@...ogic.com>
>>> Add C3 PLL controller input clock parameters "fix".
>>> The clock named "fix" was initially implemented in PLL clock controller
>>> driver. However, some registers required secure zone access, so we moved
>>> it to the secure zone (BL31) and accessed it through SCMI. Since the PLL
>>> clock driver needs to use this clock, the "fix" clock is used as an input
>>> source. We updated the driver but forgot to modify the binding accordingly,
>>> so we are adding it here.
>>> It is an ABI break but on a new and immature platform. Noboby could
>>> really
>>> use that platform at this stage, so nothing is going to break on anyone
>>> really.
>>> Fixes: 0e6be855a96d ("dt-bindings: clock: add Amlogic C3 PLL clock
>>> controller")
>>> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
>>> Signed-off-by: Xianwei Zhao <xianwei.zhao@...ogic.com>
>>> ---
>>>    Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml | 7 +++++--
>>
>> So you mind if I take this one via my arm64-dt tree ?
> 
> There is no conflicting change in my tree so it's fine, yes.

Thanks
Neil

> 
>>
>> Neil
>>
>> <snip>
> 


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ