linux-kernel - Re: get, prepare, enable a clock not in DT?

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <6cd18742-7ba8-4b0c-aff9-7065bccd4095@tuxon.dev>
Date: Sat, 31 Aug 2024 18:49:59 +0300
From: claudiu beznea <claudiu.beznea@...on.dev>
To: linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org,
 Nicolas Ferre <nicolas.ferre@...rochip.com>
Subject: Re: get, prepare, enable a clock not in DT?

Hi, Alexander,

On 28.08.2024 09:55, Alexander Dahl wrote:
> Hello Claudiu,
> 
> Am Fri, Aug 23, 2024 at 05:29:44PM +0300 schrieb claudiu beznea:
>>
>>
>> On 20.08.2024 15:17, Alexander Dahl wrote:
>>> By chance: I don't have a sama7g5 based board at hand for testing.
>>> The datasheet says the same as for sam9x60.
>>> Does the nvmem_microchip_otpc driver actually work without timeout on
>>> sama7g5?
>>
>> Yes! This should be because system bus is clocked from MCK0 (as mentioned
>> in peripheral identifiers table) which is enabled by bootloader.
> 
> Not sure I can follow.  Citing the SAMA7G5 datasheet section 30.4
> (OTPC Product Dependencies):
> 
>     "The OTPC is clocked through the Power Management Controller
>     (PMC). The user must power on the main RC oscillator and enable
>     the peripheral clock of the OTPC prior to reading or writing the
>     OTP memory."

I don't see this in [1]. Only:

"The OTPC is clocked through the Power Management Controller (PMC), so the
programmer must first to configure the PMC."

>From this I got that it is about the MCK0 listed in table Table 8-11.
Peripheral Identifiers.

[1]
https://ww1.microchip.com/downloads/aemDocuments/documents/MPU32/ProductDocuments/DataSheets/SAMA7G5-Series-Data-Sheet-DS60001765A.pdf

> 
> Table from section 8.5 (Peripheral Clocks …) has no check mark at "PMC
> clock control" but indeed lists MCK0 as main system bus clock.

This is what I was taking about.

>  If it
> works on SAMA7G5 without explicitly enabling main RC oscillator, then
> either that clock is on accidentally, or the datasheet is wrong in the
> OTPC section.

Might be.

Thank you,
Claudiu Beznea

> 
> Personally I find the "clocked through PMC" part in the OTPC
> section suspicious, because in the peripheral identifiers table OTPC
> has no "PMC Clock Control" mark.
> 
> Not sure what's the difference between SAM9X60 and SAMA7G5 internally,
> though.  From a user's POV it's possible one of them requires the
> main RC osc, and the other does not, but currently you can't tell from
> the datasheets.
> 
>> Here is a snapshot of reading the NVMEM on a SAMA7G5 with bootconfig and
>> thermal calibration packets:
>> https://www.linux4sam.org/bin/view/Linux4SAM/ThermalFaq
> 
> Greets
> Alex
>