linux-kernel - Re: [PATCH v5 4/4] x86/cacheinfo: Clean out init_cache

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Message-ID: <20240902074140.GA4179@alberich>
Date: Mon, 2 Sep 2024 09:41:40 +0200
From: Andreas Herrmann <aherrmann@...e.de>
To: Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>
Cc: x86@...nel.org, Andreas Herrmann <aherrmann@...e.com>,
	Catalin Marinas <catalin.marinas@....com>,
	Chen Yu <yu.c.chen@...el.com>, Len Brown <len.brown@...el.com>,
	Radu Rendec <rrendec@...hat.com>,
	Pierre Gondois <Pierre.Gondois@....com>, Pu Wen <puwen@...on.cn>,
	"Rafael J. Wysocki" <rafael.j.wysocki@...el.com>,
	Sudeep Holla <sudeep.holla@....com>,
	Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>,
	Will Deacon <will@...nel.org>, Zhang Rui <rui.zhang@...el.com>,
	Nikolay Borisov <nik.borisov@...e.com>,
	Huang Ying <ying.huang@...el.com>,
	Ricardo Neri <ricardo.neri@...el.com>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v5 4/4] x86/cacheinfo: Clean out init_cache_level()

On Sun, Sep 01, 2024 at 08:09:13PM +0200, Andreas Herrmann wrote:
> On Mon, Aug 26, 2024 at 10:16:35PM -0700, Ricardo Neri wrote:
> > init_cache_level() no longer has a purpose on x86. It no longer needs to
> > set num_leaves, and it never had to set num_levels, which was unnecessary
> > on x86.
> > 
> > Replace it with "return 0" simply to override the weak function, which
> > would return an error.
> > 
> > Reviewed-by: Len Brown <len.brown@...el.com>
> > Signed-off-by: Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>
> 
> Reviewed-by: Andreas Herrmann <aherrmann@...e.de>
> Tested-by: Andreas Herrmann <aherrmann@...e.de>
> 
> Test was done with a system equipped with AMD Phenom II X6 1055T and
> test kernels based on v6.11-rc5-176-g20371ba12063.

FYI, the test consisted of booting the mainline kernel w/o and w/ your
patches, checking for potential new errors/warnings in kernel log and
checking for changes or incosistencies in information of cache
characteristics as reported in sysfs, and by some tools (lscpu,
lstopo, x86info) -- e.g. x86info does not use sysfs to gather cache
information for CPUs.


Regards,
Andreas