[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-ID: <cover.1725392645.git.Ryan.Wanner@microchip.com>
Date: Wed, 4 Sep 2024 08:54:10 -0700
From: <Ryan.Wanner@...rochip.com>
To: <mturquette@...libre.com>, <sboyd@...nel.org>,
<nicolas.ferre@...rochip.com>, <alexandre.belloni@...tlin.com>,
<claudiu.beznea@...on.dev>
CC: <varshini.rajendran@...rochip.com>, <linux-kernel@...r.kernel.org>,
<linux-clk@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>, "Ryan
Wanner" <Ryan.Wanner@...rochip.com>
Subject: [PATCH v2 0/3]clk: at91: add sama7d65 clock support
From: Ryan Wanner <Ryan.Wanner@...rochip.com>
Hello,
This series adds clock support for the SAMA7D65 SoC. There are also
changes to the master clock driver and PLL driver in order to account for
the increased amount of clocks being supported in this new SoC.
Trying to account for all the updates happening in this system, this
patch set is based off of the most recent updates to at91-next branch.
Changes in v2:
- Correct PLL ID from PLL_ID_IMG to PLL_ID_GPU in the description.
- Adjust master clock description to match amount of master clocks 0-9.
- Correct bad spacing and bad alignment.
- Remove double variable definition.
- Add missing kfree() at end of function.
- Reorganize clk and pll driver changes in patch set.
Ryan Wanner (3):
clk: at91: clk-master: increase maximum number of clocks
clk: at91: clk-sam9x60-pll: increase maximum amount of plls
clk: at91: sama7d65: add sama7d65 pmc driver
drivers/clk/at91/Makefile | 1 +
drivers/clk/at91/clk-master.c | 2 +-
drivers/clk/at91/clk-sam9x60-pll.c | 2 +-
drivers/clk/at91/pmc.c | 1 +
drivers/clk/at91/sama7d65.c | 1373 ++++++++++++++++++++++++++++
5 files changed, 1377 insertions(+), 2 deletions(-)
create mode 100644 drivers/clk/at91/sama7d65.c
--
2.43.0
Powered by blists - more mailing lists