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Message-ID: <a4b30cf0-3432-475c-9266-51b79780a666@quicinc.com>
Date: Wed, 4 Sep 2024 09:45:05 +0530
From: Raviteja Laggyshetty <quic_rlaggysh@...cinc.com>
To: Krzysztof Kozlowski <krzk@...nel.org>, Georgi Djakov <djakov@...nel.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
CC: Konrad Dybcio <konradybcio@...nel.org>,
Danila Tikhonov
<danila@...xyga.com>,
Neil Armstrong <neil.armstrong@...aro.org>,
"Vladimir
Lypak" <vladimir.lypak@...il.com>,
Adam Skladowski <a39.skl@...il.com>,
"Sibi
Sankar" <quic_sibis@...cinc.com>,
Rohit Agarwal <quic_rohiagar@...cinc.com>,
Rajendra Nayak <quic_rjendra@...cinc.com>,
Andrew Halaney
<ahalaney@...hat.com>, <linux-arm-msm@...r.kernel.org>,
<linux-pm@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <quic_mdtipton@...cinc.com>,
<quic_okukatla@...cinc.com>
Subject: Re: [PATCH 1/2] dt-bindings: interconnect: Add Qualcomm QCS8300 DT
bindings
On 8/27/2024 9:02 PM, Krzysztof Kozlowski wrote:
> On 27/08/2024 17:16, Raviteja Laggyshetty wrote:
>> The Qualcomm QCS8300 SoC has several bus fabrics that could be
>> controlled and tuned dynamically according to the bandwidth demand.
>>
>> Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@...cinc.com>
>> ---
> A nit, subject: drop second/last, redundant "DT bindings". The
> "dt-bindings" prefix is already stating that these are bindings.
> See also:
> https://elixir.bootlin.com/linux/v6.7-rc8/source/Documentation/devicetree/bindings/submitting-patches.rst#L18
>
> And you do not add "Qualcomm QCS8300" here. QCS8300 is a SoC. You add
> here specific device, right?
Agreed, QCS8300 should be enough, I will update the commit text, addressing the comments.
>
>> .../interconnect/qcom,qcs8300-rpmh.yaml | 50 +++++
>> .../interconnect/qcom,qcs8300-rpmh.h | 189 ++++++++++++++++++
>> 2 files changed, 239 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,qcs8300-rpmh.yaml
>> create mode 100644 include/dt-bindings/interconnect/qcom,qcs8300-rpmh.h
>>
>> diff --git a/Documentation/devicetree/bindings/interconnect/qcom,qcs8300-rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,qcs8300-rpmh.yaml
>> new file mode 100644
>> index 000000000000..ac75eeb6a6b4
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/interconnect/qcom,qcs8300-rpmh.yaml
>> @@ -0,0 +1,50 @@
>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/interconnect/qcom,qcs8300-rpmh.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Qualcomm Technologies, Inc. RPMh Network-On-Chip Interconnect on QCS8300
>> +
>> +maintainers:
>> + - Raviteja Laggyshetty <quic_rlaggysh@...cinc.com>
>> +
>> +description: |
>> + RPMh interconnect providers support system bandwidth requirements through
>> + RPMh hardware accelerators known as Bus Clock Manager (BCM).
>> +
>> + See also:: include/dt-bindings/interconnect/qcom,qcs8300.h
> Just one ':'
Will address this in next revision of patch.
>
>> +required:
>> + - compatible
>> +
>> +allOf:
>> + - $ref: qcom,rpmh-common.yaml#
>> +
>> +unevaluatedProperties: false
>> +
>> +examples:
>> + - |
>> + gem_noc: interconnect-gem-noc {
>> + compatible = "qcom,qcs8300-gem-noc";
> Hm, no reg?
>
> Where is your DTS? Please follow standard upstream process, which means
> you send DTS separately. Your internal guideline already should cover
> that. If it does not, please look at upstreaming of SM8650, update your
> guideline and then follow SM8650 process. That way we can verify that
> what you send is true.
Thanks for the review !
I will share the link to DTSi change and will update the yaml in the next revision.
> Best regards,
> Krzysztof
Thanks,
Raviteja.
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