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Message-ID: <22657edf-5df9-44dc-b2a8-134ae613d819@kernel.org>
Date: Wed, 4 Sep 2024 12:23:01 +0200
From: Konrad Dybcio <konradybcio@...nel.org>
To: Krzysztof Kozlowski <krzk@...nel.org>,
Lijuan Gao <quic_lijuang@...cinc.com>
Cc: Thomas Gleixner <tglx@...utronix.de>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, kernel@...cinc.com,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH 6/6] arm64: dts: qcom: add base QCS615 RIDE dts
On 4.09.2024 11:32 AM, Krzysztof Kozlowski wrote:
> On 04/09/2024 10:35, Lijuan Gao wrote:
>>
>>
>> 在 8/28/2024 5:34 PM, Krzysztof Kozlowski 写道:
>>> On 28/08/2024 11:31, Lijuan Gao wrote:
>>>>>>>> +/ {
>>>>>>>> + model = "Qualcomm Technologies, Inc. QCS615 Ride";
>>>>>>>> + compatible = "qcom,qcs615-ride", "qcom,qcs615";
>>>>>>>> +
>>>>>>>> + chosen {
>>>>>>>> + bootargs = "console=hvc0";
>>>>>>>
>>>>>>> Noooo, last time I agreed on this, you told me later it is different.
>>>>>>>
>>>>>> In the early stages, enabling HVC is to more easily verify clock and
>>>>>> PMIC related functions, as it’s difficult to debug without the console
>>>>>> log. After the clock and PMIC are ready, we will enable the UART console.
>>>>>
>>>>> Working serial is supposed to be part of the early submission.
>>>>>
>>>> Okay, I will remove it in the next patch.
>>>
>>> Can you post next version with proper serial device?
>>>
>>> Best regards,
>>> Krzysztof
>>>
>> Hi Krzysztof,
>>
>> Can we use the dts without console enabled as the first version? When
>> the clock is ready, we will submit new changes to enable the UART console.
>
> It is very surprising not to have console available in the first, early
> submission, but it is not a blocker for me.
Lijuan,
I see that the initial submission is very slim. GCC+UART+TLMM is
usually the smallest we tend to accept.
While hooking up these drivers may take some time, please consider
at least describing a subset of the clocks and the QUP UART, as
everything non-SoC-specific is already in place.
Konrad
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