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Message-ID: <732cea84-3d2d-469c-93a0-76d93d8271bc@gmail.com>
Date: Fri, 6 Sep 2024 00:01:20 +0200
From: Matthias Brugger <matthias.bgg@...il.com>
To: Alexandre Mergnat <amergnat@...libre.com>,
 Liam Girdwood <lgirdwood@...il.com>, Mark Brown <broonie@...nel.org>,
 Jaroslav Kysela <perex@...ex.cz>, Takashi Iwai <tiwai@...e.com>,
 AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
 Catalin Marinas <catalin.marinas@....com>, Will Deacon <will@...nel.org>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>
Cc: linux-kernel@...r.kernel.org, linux-sound@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org,
 devicetree@...r.kernel.org
Subject: Re: [PATCH v8 4/5] arm64: dts: mediatek: add afe support for mt8365
 SoC



On 05/09/2024 11:07, Alexandre Mergnat wrote:
> Add audio front end support of MT8365 SoC.
> Update the file header.
> 
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
> Signed-off-by: Alexandre Mergnat <amergnat@...libre.com>

Applied, thanks

> ---
>   arch/arm64/boot/dts/mediatek/mt8365.dtsi | 43 ++++++++++++++++++++++++++++++--
>   1 file changed, 41 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
> index eb449bfa8803..9c91fe8ea0f9 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
> @@ -2,9 +2,11 @@
>   /*
>    * (C) 2018 MediaTek Inc.
>    * Copyright (C) 2022 BayLibre SAS
> - * Fabien Parent <fparent@...libre.com>
> - * Bernhard Rosenkränzer <bero@...libre.com>
> + * Authors: Fabien Parent <fparent@...libre.com>
> + *	    Bernhard Rosenkränzer <bero@...libre.com>
> + *	    Alexandre Mergnat <amergnat@...libre.com>
>    */
> +
>   #include <dt-bindings/clock/mediatek,mt8365-clk.h>
>   #include <dt-bindings/interrupt-controller/arm-gic.h>
>   #include <dt-bindings/interrupt-controller/irq.h>
> @@ -812,6 +814,43 @@ apu: syscon@...20000 {
>   			reg = <0 0x19020000 0 0x1000>;
>   			#clock-cells = <1>;
>   		};
> +
> +		afe: audio-controller@...20000 {
> +			compatible = "mediatek,mt8365-afe-pcm";
> +			reg = <0 0x11220000 0 0x1000>;
> +			#sound-dai-cells = <0>;
> +			clocks = <&clk26m>,
> +				 <&topckgen CLK_TOP_AUDIO_SEL>,
> +				 <&topckgen CLK_TOP_AUD_I2S0_M>,
> +				 <&topckgen CLK_TOP_AUD_I2S1_M>,
> +				 <&topckgen CLK_TOP_AUD_I2S2_M>,
> +				 <&topckgen CLK_TOP_AUD_I2S3_M>,
> +				 <&topckgen CLK_TOP_AUD_ENGEN1_SEL>,
> +				 <&topckgen CLK_TOP_AUD_ENGEN2_SEL>,
> +				 <&topckgen CLK_TOP_AUD_1_SEL>,
> +				 <&topckgen CLK_TOP_AUD_2_SEL>,
> +				 <&topckgen CLK_TOP_APLL_I2S0_SEL>,
> +				 <&topckgen CLK_TOP_APLL_I2S1_SEL>,
> +				 <&topckgen CLK_TOP_APLL_I2S2_SEL>,
> +				 <&topckgen CLK_TOP_APLL_I2S3_SEL>;
> +			clock-names = "top_clk26m_clk",
> +				      "top_audio_sel",
> +				      "audio_i2s0_m",
> +				      "audio_i2s1_m",
> +				      "audio_i2s2_m",
> +				      "audio_i2s3_m",
> +				      "engen1",
> +				      "engen2",
> +				      "aud1",
> +				      "aud2",
> +				      "i2s0_m_sel",
> +				      "i2s1_m_sel",
> +				      "i2s2_m_sel",
> +				      "i2s3_m_sel";
> +			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_LOW>;
> +			power-domains = <&spm MT8365_POWER_DOMAIN_AUDIO>;
> +			status = "disabled";
> +		};
>   	};
>   
>   	timer {
> 

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