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Message-ID: <0ffcc54f-f06d-41c6-b0d0-cc420ebc1527@gmail.com>
Date: Fri, 6 Sep 2024 00:01:46 +0200
From: Matthias Brugger <matthias.bgg@...il.com>
To: Alexandre Mergnat <amergnat@...libre.com>,
Liam Girdwood <lgirdwood@...il.com>, Mark Brown <broonie@...nel.org>,
Jaroslav Kysela <perex@...ex.cz>, Takashi Iwai <tiwai@...e.com>,
AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
Catalin Marinas <catalin.marinas@....com>, Will Deacon <will@...nel.org>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-kernel@...r.kernel.org, linux-sound@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH v8 5/5] arm64: dts: mediatek: add audio support for
mt8365-evk
On 05/09/2024 11:07, Alexandre Mergnat wrote:
> Add the sound node which is linked to the MT8365 SoC AFE and
> the MT6357 audio codec.
>
> Update the file header.
>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
> Signed-off-by: Alexandre Mergnat <amergnat@...libre.com>
Applied, thanks!
> ---
> arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 86 +++++++++++++++++++++++++++++
> 1 file changed, 86 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts
> index 4211a992dd9d..7d90112a7e27 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts
> +++ b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts
> @@ -4,6 +4,7 @@
> * Authors:
> * Fabien Parent <fparent@...libre.com>
> * Bernhard Rosenkränzer <bero@...libre.com>
> + * Alexandre Mergnat <amergnat@...libre.com>
> */
>
> /dts-v1/;
> @@ -86,6 +87,28 @@ optee_reserved: optee@...00000 {
> reg = <0 0x43200000 0 0x00c00000>;
> };
> };
> +
> + sound: sound {
> + compatible = "mediatek,mt8365-mt6357";
> + pinctrl-names = "default",
> + "dmic",
> + "miso_off",
> + "miso_on",
> + "mosi_off",
> + "mosi_on";
> + pinctrl-0 = <&aud_default_pins>;
> + pinctrl-1 = <&aud_dmic_pins>;
> + pinctrl-2 = <&aud_miso_off_pins>;
> + pinctrl-3 = <&aud_miso_on_pins>;
> + pinctrl-4 = <&aud_mosi_off_pins>;
> + pinctrl-5 = <&aud_mosi_on_pins>;
> + mediatek,platform = <&afe>;
> + };
> +};
> +
> +&afe {
> + mediatek,dmic-mode = <1>;
> + status = "okay";
> };
>
> &cpu0 {
> @@ -178,9 +201,72 @@ &mt6357_pmic {
> interrupts-extended = <&pio 145 IRQ_TYPE_LEVEL_HIGH>;
> interrupt-controller;
> #interrupt-cells = <2>;
> + mediatek,micbias0-microvolt = <1900000>;
> + mediatek,micbias1-microvolt = <1700000>;
> };
>
> &pio {
> + aud_default_pins: audiodefault-pins {
> + clk-dat-pins {
> + pinmux = <MT8365_PIN_72_CMDAT4__FUNC_I2S3_BCK>,
> + <MT8365_PIN_73_CMDAT5__FUNC_I2S3_LRCK>,
> + <MT8365_PIN_74_CMDAT6__FUNC_I2S3_MCK>,
> + <MT8365_PIN_75_CMDAT7__FUNC_I2S3_DO>;
> + };
> + };
> +
> + aud_dmic_pins: audiodmic-pins {
> + clk-dat-pins {
> + pinmux = <MT8365_PIN_117_DMIC0_CLK__FUNC_DMIC0_CLK>,
> + <MT8365_PIN_118_DMIC0_DAT0__FUNC_DMIC0_DAT0>,
> + <MT8365_PIN_119_DMIC0_DAT1__FUNC_DMIC0_DAT1>;
> + };
> + };
> +
> + aud_miso_off_pins: misooff-pins {
> + clk-dat-pins {
> + pinmux = <MT8365_PIN_53_AUD_CLK_MISO__FUNC_GPIO53>,
> + <MT8365_PIN_54_AUD_SYNC_MISO__FUNC_GPIO54>,
> + <MT8365_PIN_55_AUD_DAT_MISO0__FUNC_GPIO55>,
> + <MT8365_PIN_56_AUD_DAT_MISO1__FUNC_GPIO56>;
> + input-enable;
> + bias-pull-down;
> + drive-strength = <2>;
> + };
> + };
> +
> + aud_miso_on_pins: misoon-pins {
> + clk-dat-pins {
> + pinmux = <MT8365_PIN_53_AUD_CLK_MISO__FUNC_AUD_CLK_MISO>,
> + <MT8365_PIN_54_AUD_SYNC_MISO__FUNC_AUD_SYNC_MISO>,
> + <MT8365_PIN_55_AUD_DAT_MISO0__FUNC_AUD_DAT_MISO0>,
> + <MT8365_PIN_56_AUD_DAT_MISO1__FUNC_AUD_DAT_MISO1>;
> + drive-strength = <6>;
> + };
> + };
> +
> + aud_mosi_off_pins: mosioff-pins {
> + clk-dat-pins {
> + pinmux = <MT8365_PIN_49_AUD_CLK_MOSI__FUNC_GPIO49>,
> + <MT8365_PIN_50_AUD_SYNC_MOSI__FUNC_GPIO50>,
> + <MT8365_PIN_51_AUD_DAT_MOSI0__FUNC_GPIO51>,
> + <MT8365_PIN_52_AUD_DAT_MOSI1__FUNC_GPIO52>;
> + input-enable;
> + bias-pull-down;
> + drive-strength = <2>;
> + };
> + };
> +
> + aud_mosi_on_pins: mosion-pins {
> + clk-dat-pins {
> + pinmux = <MT8365_PIN_49_AUD_CLK_MOSI__FUNC_AUD_CLK_MOSI>,
> + <MT8365_PIN_50_AUD_SYNC_MOSI__FUNC_AUD_SYNC_MOSI>,
> + <MT8365_PIN_51_AUD_DAT_MOSI0__FUNC_AUD_DAT_MOSI0>,
> + <MT8365_PIN_52_AUD_DAT_MOSI1__FUNC_AUD_DAT_MOSI1>;
> + drive-strength = <6>;
> + };
> + };
> +
> ethernet_pins: ethernet-pins {
> phy_reset_pins {
> pinmux = <MT8365_PIN_133_TDM_TX_DATA1__FUNC_GPIO133>;
>
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