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Message-ID: <CAAhV-H64tf8=XekeBKwR3w65ofjUrbgeqPngNxiT-11EHMKwdA@mail.gmail.com>
Date: Sun, 8 Sep 2024 10:38:07 +0800
From: Huacai Chen <chenhuacai@...nel.org>
To: Jiaxun Yang <jiaxun.yang@...goat.com>
Cc: WANG Xuerui <kernel@...0n.name>, "Rafael J. Wysocki" <rafael@...nel.org>, 
	Viresh Kumar <viresh.kumar@...aro.org>, Thomas Gleixner <tglx@...utronix.de>, 
	Thomas Bogendoerfer <tsbogend@...ha.franken.de>, loongarch@...ts.linux.dev, 
	linux-kernel@...r.kernel.org, linux-pm@...r.kernel.org, 
	linux-mips@...r.kernel.org, kvm@...r.kernel.org
Subject: Re: [PATCH 1/5] LoongArch: Rename cpu_has_csr as cpu_has_iocsr

Hi, Jiaxun,

On Sat, Sep 7, 2024 at 6:17 PM Jiaxun Yang <jiaxun.yang@...goat.com> wrote:
>
> It meant to be IOCSR as CSR is not optional for LoongArch.
Keep the CSR definition and add IOCSR definition after it, OK? This
also means the 1st patch can be dropped.

And it is just OK to change the values after CPU_FEATURE_CSR, because
they are only for internal use.

Huacai
>
> Signed-off-by: Jiaxun Yang <jiaxun.yang@...goat.com>
> ---
>  arch/loongarch/include/asm/cpu-features.h | 2 +-
>  arch/loongarch/include/asm/cpu.h          | 2 +-
>  arch/loongarch/kernel/cpu-probe.c         | 2 +-
>  3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/loongarch/include/asm/cpu-features.h b/arch/loongarch/include/asm/cpu-features.h
> index 16a716f88a5c..0190ed28a647 100644
> --- a/arch/loongarch/include/asm/cpu-features.h
> +++ b/arch/loongarch/include/asm/cpu-features.h
> @@ -50,7 +50,7 @@
>  #define cpu_has_lbt_arm                cpu_opt(LOONGARCH_CPU_LBT_ARM)
>  #define cpu_has_lbt_mips       cpu_opt(LOONGARCH_CPU_LBT_MIPS)
>  #define cpu_has_lbt            (cpu_has_lbt_x86|cpu_has_lbt_arm|cpu_has_lbt_mips)
> -#define cpu_has_csr            cpu_opt(LOONGARCH_CPU_CSR)
> +#define cpu_has_iocsr          cpu_opt(LOONGARCH_CPU_IOCSR)
>  #define cpu_has_tlb            cpu_opt(LOONGARCH_CPU_TLB)
>  #define cpu_has_watch          cpu_opt(LOONGARCH_CPU_WATCH)
>  #define cpu_has_vint           cpu_opt(LOONGARCH_CPU_VINT)
> diff --git a/arch/loongarch/include/asm/cpu.h b/arch/loongarch/include/asm/cpu.h
> index 843f9c4ec980..7c44f4ede3a2 100644
> --- a/arch/loongarch/include/asm/cpu.h
> +++ b/arch/loongarch/include/asm/cpu.h
> @@ -115,7 +115,7 @@ enum cpu_type_enum {
>  #define LOONGARCH_CPU_LBT_ARM          BIT_ULL(CPU_FEATURE_LBT_ARM)
>  #define LOONGARCH_CPU_LBT_MIPS         BIT_ULL(CPU_FEATURE_LBT_MIPS)
>  #define LOONGARCH_CPU_TLB              BIT_ULL(CPU_FEATURE_TLB)
> -#define LOONGARCH_CPU_CSR              BIT_ULL(CPU_FEATURE_CSR)
> +#define LOONGARCH_CPU_IOCSR            BIT_ULL(CPU_FEATURE_IOCSR)
>  #define LOONGARCH_CPU_WATCH            BIT_ULL(CPU_FEATURE_WATCH)
>  #define LOONGARCH_CPU_VINT             BIT_ULL(CPU_FEATURE_VINT)
>  #define LOONGARCH_CPU_CSRIPI           BIT_ULL(CPU_FEATURE_CSRIPI)
> diff --git a/arch/loongarch/kernel/cpu-probe.c b/arch/loongarch/kernel/cpu-probe.c
> index 14f0449f5452..4446616d497c 100644
> --- a/arch/loongarch/kernel/cpu-probe.c
> +++ b/arch/loongarch/kernel/cpu-probe.c
> @@ -91,7 +91,7 @@ static void cpu_probe_common(struct cpuinfo_loongarch *c)
>         unsigned int config;
>         unsigned long asid_mask;
>
> -       c->options = LOONGARCH_CPU_CPUCFG | LOONGARCH_CPU_CSR |
> +       c->options = LOONGARCH_CPU_CPUCFG | LOONGARCH_CPU_IOCSR |
>                      LOONGARCH_CPU_TLB | LOONGARCH_CPU_VINT | LOONGARCH_CPU_WATCH;
>
>         elf_hwcap = HWCAP_LOONGARCH_CPUCFG;
>
> --
> 2.46.0
>

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