linux-kernel - [PATCH v3 6/6] gpio: aspeed: Add the flush write to ensure the write complete.

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20240913074325.239390-7-billy_tsai@aspeedtech.com>
Date: Fri, 13 Sep 2024 15:43:25 +0800
From: Billy Tsai <billy_tsai@...eedtech.com>
To: <linus.walleij@...aro.org>, <brgl@...ev.pl>, <robh@...nel.org>,
	<krzk+dt@...nel.org>, <conor+dt@...nel.org>, <joel@....id.au>,
	<andrew@...econstruct.com.au>, <linux-gpio@...r.kernel.org>,
	<devicetree@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>,
	<linux-aspeed@...ts.ozlabs.org>, <linux-kernel@...r.kernel.org>,
	<BMC-SW@...eedtech.com>, <Peter.Yin@...ntatw.com>
Subject: [PATCH v3 6/6] gpio: aspeed: Add the flush write to ensure the write complete.

Performing a dummy read ensures that the register write operation is fully
completed, mitigating any potential bus delays that could otherwise impact
the frequency of bitbang usage. E.g., if the JTAG application uses GPIO to
control the JTAG pins (TCK, TMS, TDI, TDO, and TRST), and the application
sets the TCK clock to 1 MHz, the GPIO’s high/low transitions will rely on
a delay function to ensure the clock frequency does not exceed 1 MHz.
However, this can lead to rapid toggling of the GPIO because the write
operation is POSTed and does not wait for a bus acknowledgment.

Signed-off-by: Billy Tsai <billy_tsai@...eedtech.com>
---
 drivers/gpio/gpio-aspeed.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c
index d322c03481a8..d1e61ee48da2 100644
--- a/drivers/gpio/gpio-aspeed.c
+++ b/drivers/gpio/gpio-aspeed.c
@@ -406,6 +406,8 @@ static void __aspeed_gpio_set(struct gpio_chip *gc, unsigned int offset,
 	gpio->dcache[GPIO_BANK(offset)] = reg;

 	gpio->config->llops->reg_bits_set(gpio, offset, reg_val, val);
+	// flush write
+	gpio->config->llops->reg_bits_read(gpio, offset, reg_val);
 }

 static void aspeed_gpio_set(struct gpio_chip *gc, unsigned int offset,
-- 
2.25.1