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Message-ID: <4cbc14ad-0b2f-476e-8da2-08986776eae8@linaro.org>
Date: Fri, 13 Sep 2024 09:44:19 +0200
From: Neil Armstrong <neil.armstrong@...aro.org>
To: Dominique Martinet <asmadeus@...ewreck.org>, Liu Ying
 <victor.liu@....com>, Andrzej Hajda <andrzej.hajda@...el.com>,
 Robert Foss <rfoss@...nel.org>,
 Laurent Pinchart <Laurent.pinchart@...asonboard.com>,
 Jonas Karlman <jonas@...boo.se>, Jernej Skrabec <jernej.skrabec@...il.com>,
 Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
 Maxime Ripard <mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>,
 David Airlie <airlied@...il.com>, Daniel Vetter <daniel@...ll.ch>,
 Shawn Guo <shawnguo@...nel.org>, Sascha Hauer <s.hauer@...gutronix.de>,
 Pengutronix Kernel Team <kernel@...gutronix.de>,
 Fabio Estevam <festevam@...il.com>
Cc: Adam Ford <aford173@...il.com>, Lucas Stach <l.stach@...gutronix.de>,
 Frieder Schrempf <frieder.schrempf@...tron.de>,
 dri-devel@...ts.freedesktop.org, imx@...ts.linux.dev,
 linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
 Dominique Martinet <dominique.martinet@...ark-techno.com>
Subject: Re: [PATCH v2] drm/bridge: imx8mp-hdmi-tx: allow 0.5% margin with
 selected clock

On 07/09/2024 07:54, Dominique Martinet wrote:
> From: Dominique Martinet <dominique.martinet@...ark-techno.com>
> 
> This allows the hdmi driver to pick e.g. 64.8MHz instead of 65Mhz when we
> cannot output the exact frequency, enabling the imx8mp HDMI output to
> support more modes
> 
> Tested-by: Adam Ford <aford173@...il.com> #imx8mp-beacon
> Reviewed-by: Frieder Schrempf <frieder.schrempf@...tron.de>
> Tested-by: Frieder Schrempf <frieder.schrempf@...tron.de>
> Signed-off-by: Dominique Martinet <dominique.martinet@...ark-techno.com>
> ---
> Changes in v2:
> - Improve comment about the tolerance
> - Link to v1: https://lore.kernel.org/r/20240904083103.1257480-1-dominique.martinet@atmark-techno.com
> ---
>   drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c | 11 +++++++++--
>   1 file changed, 9 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c b/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
> index 13bc570c5473..200d65184159 100644
> --- a/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
> +++ b/drivers/gpu/drm/bridge/imx/imx8mp-hdmi-tx.c
> @@ -23,6 +23,7 @@ imx8mp_hdmi_mode_valid(struct dw_hdmi *dw_hdmi, void *data,
>   		       const struct drm_display_mode *mode)
>   {
>   	struct imx8mp_hdmi *hdmi = (struct imx8mp_hdmi *)data;
> +	long round_rate;
>   
>   	if (mode->clock < 13500)
>   		return MODE_CLOCK_LOW;
> @@ -30,8 +31,14 @@ imx8mp_hdmi_mode_valid(struct dw_hdmi *dw_hdmi, void *data,
>   	if (mode->clock > 297000)
>   		return MODE_CLOCK_HIGH;
>   
> -	if (clk_round_rate(hdmi->pixclk, mode->clock * 1000) !=
> -	    mode->clock * 1000)
> +	round_rate = clk_round_rate(hdmi->pixclk, mode->clock * 1000);
> +	/* imx8mp's pixel clock generator (fsl-samsung-hdmi) cannot generate
> +	 * all possible frequencies, so allow some tolerance to support more
> +	 * modes.
> +	 * Allow 0.5% difference allowed in various standards (VESA, CEA861)
> +	 * 0.5% = 5/1000 tolerance (mode->clock is 1/1000)
> +	 */
> +	if (abs(round_rate - mode->clock * 1000) > mode->clock * 5)
>   		return MODE_CLOCK_RANGE;
>   
>   	/* We don't support double-clocked and Interlaced modes */
> 
> ---
> base-commit: 67784a74e258a467225f0e68335df77acd67b7ab
> change-id: 20240907-hdmi-tolerance-4d83074a4517
> 
> Best regards,

Reviewed-by: Neil Armstrong <neil.armstrong@...aro.org>

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