linux-kernel - Re: [PATCH 6.6 v2 1/4] riscv: dts: starfive: add assigned-clock* to limit frquency

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Message-ID: <2024091350-lapdog-tarot-0130@gregkh>
Date: Fri, 13 Sep 2024 14:42:10 +0200
From: Greg KH <gregkh@...uxfoundation.org>
To: WangYuli <wangyuli@...ontech.com>
Cc: stable@...r.kernel.org, sashal@...nel.org, william.qiu@...rfivetech.com,
	emil.renner.berthing@...onical.com, conor.dooley@...rochip.com,
	xingyu.wu@...rfivetech.com, walker.chen@...rfivetech.com,
	robh@...nel.org, hal.feng@...rfivetech.com, kernel@...il.dk,
	robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
	conor+dt@...nel.org, paul.walmsley@...ive.com, palmer@...belt.com,
	aou@...s.berkeley.edu, devicetree@...r.kernel.org,
	linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
	richardcochran@...il.com, netdev@...r.kernel.org
Subject: Re: [PATCH 6.6 v2 1/4] riscv: dts: starfive: add assigned-clock* to
 limit frquency

On Thu, Sep 12, 2024 at 10:55:05AM +0800, WangYuli wrote:
> From: William Qiu <william.qiu@...rfivetech.com>
> 
> [ Upstream commit af571133f7ae028ec9b5fdab78f483af13bf28d3 ]
> 
> In JH7110 SoC, we need to go by-pass mode, so we need add the
> assigned-clock* properties to limit clock frquency.
> 
> Signed-off-by: William Qiu <william.qiu@...rfivetech.com>
> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@...onical.com>
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
> Signed-off-by: WangYuli <wangyuli@...ontech.com>
> ---
>  .../riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 4 ++++
>  1 file changed, 4 insertions(+)

Please rework this series and send only what is needed here.

thanks,

greg k-h