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Message-ID: <20240914-lan969x-pinctrl-v1-0-1b3a4d454b0d@microchip.com>
Date: Sat, 14 Sep 2024 21:10:07 +0200
From: Daniel Machon <daniel.machon@...rochip.com>
To: Linus Walleij <linus.walleij@...aro.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Alexandre Belloni <alexandre.belloni@...tlin.com>, Lars Povlsen
<lars.povlsen@...rochip.com>, Horatiu Vultur <horatiu.vultur@...rochip.com>,
Steen Hegelund <Steen.Hegelund@...rochip.com>
CC: <linux-gpio@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>
Subject: [PATCH 0/2] pinctrl: ocelot: add support for lan969x SoC
This series adds support for lan969x SoC pinctrl by reusing the existing
Ocelot pinctrl driver.
There are 66 General Purpose I/O pins that are individually configurable
to multiple interfaces. The matrix of available GPIO alternate functions
is detailed in the pinmuxing table of patch #2.
Patch #1 adds compatible strings for lan969x in the dt-bindings.
Patch #2 adds support for lan969x SoC pinctrl.
Signed-off-by: Daniel Machon <daniel.machon@...rochip.com>
---
Daniel Machon (2):
dt-bindings: ocelot: document lan969x-pinctrl
pinctrl: ocelot: add support for lan969x SoC pinctrl
.../bindings/pinctrl/mscc,ocelot-pinctrl.yaml | 32 +++-
drivers/pinctrl/pinctrl-ocelot.c | 203 +++++++++++++++++++++
2 files changed, 227 insertions(+), 8 deletions(-)
---
base-commit: 3cfb5aa10cb78571e214e48a3a6e42c11d5288a1
change-id: 20240912-lan969x-pinctrl-4c955c0eb706
Best regards,
--
Daniel Machon <daniel.machon@...rochip.com>
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