linux-kernel - Re: [RESEND PATCH 3/3] riscv: dts: canaan: Add k230's pinctrl node

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Message-ID: <1d57b766-0db1-4266-9aa5-11c131a636df@linaro.org>
Date: Mon, 16 Sep 2024 17:52:25 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Ze Huang <18771902331@....com>, Linus Walleij <linus.walleij@...aro.org>,
 Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
 Conor Dooley <conor+dt@...nel.org>, Paul Walmsley
 <paul.walmsley@...ive.com>, Palmer Dabbelt <palmer@...belt.com>,
 Albert Ou <aou@...s.berkeley.edu>, Yangyu Chen <cyy@...self.name>
Cc: linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [RESEND PATCH 3/3] riscv: dts: canaan: Add k230's pinctrl node

On 16/09/2024 08:47, Ze Huang wrote:
> Add pinctrl device, containing default config for uart, pwm, iis, iic and
> mmc.
> 
> Signed-off-by: Ze Huang <18771902331@....com>
> ---
>  arch/riscv/boot/dts/canaan/k230-pinctrl.dtsi | 316 +++++++++++++++++++
>  arch/riscv/boot/dts/canaan/k230-pinctrl.h    |  18 ++
>  arch/riscv/boot/dts/canaan/k230.dtsi         |   2 +
>  3 files changed, 336 insertions(+)
>  create mode 100644 arch/riscv/boot/dts/canaan/k230-pinctrl.dtsi
>  create mode 100644 arch/riscv/boot/dts/canaan/k230-pinctrl.h
> 
> diff --git a/arch/riscv/boot/dts/canaan/k230-pinctrl.dtsi b/arch/riscv/boot/dts/canaan/k230-pinctrl.dtsi
> new file mode 100644
> index 000000000000..0737f50d2868
> --- /dev/null
> +++ b/arch/riscv/boot/dts/canaan/k230-pinctrl.dtsi
> @@ -0,0 +1,316 @@
> +// SPDX-License-Identifier: GPL-2.0 OR MIT
> +/*
> + * Copyright (C) 2024 Ze Huang <18771902331@....com>
> + */
> +#include "k230-pinctrl.h"
> +
> +/ {
> +	soc {
> +		pinctrl: pinctrl@...05000 {

That's odd style - defining SoC nodes outside of SoC DTSI. Are you sure
that's preferred coding style in RISC-V or Canaan?

> +			compatible = "canaan,k230-pinctrl";
> +			reg = <0x0 0x91105000 0x0 0x100>;
> +

Best regards,
Krzysztof