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Message-ID: <20240921222007.2301868-3-jonas@kwiboo.se>
Date: Sat, 21 Sep 2024 22:20:02 +0000
From: Jonas Karlman <jonas@...boo.se>
To: Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Sandy Huang <hjc@...k-chips.com>,
Heiko Stuebner <heiko@...ech.de>,
Andy Yan <andy.yan@...k-chips.com>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>,
Thomas Zimmermann <tzimmermann@...e.de>,
David Airlie <airlied@...il.com>,
Simona Vetter <simona@...ll.ch>
Cc: linux-rockchip@...ts.infradead.org,
devicetree@...r.kernel.org,
dri-devel@...ts.freedesktop.org,
linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org,
Jonas Karlman <jonas@...boo.se>
Subject: [PATCH 2/3] ARM: dts: rockchip: Split rk3288-vop into big and lit
The Rockchip RK3288 SoC contain two different Visual Output Processor
(VOP) blocks, VOP_BIG and VOP_LIT. The VOP blocks support different max
output resolution, 3840x2160 and 2560x1600.
Change compatible to differentiate between VOP_BIG and VOP_LIT, the old
compatible is kept for backward compatibility.
Signed-off-by: Jonas Karlman <jonas@...boo.se>
---
arch/arm/boot/dts/rockchip/rk3288.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/rockchip/rk3288.dtsi b/arch/arm/boot/dts/rockchip/rk3288.dtsi
index 3f1d640afafa..db4a258551f4 100644
--- a/arch/arm/boot/dts/rockchip/rk3288.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3288.dtsi
@@ -1026,7 +1026,7 @@ rga: rga@...20000 {
};
vopb: vop@...30000 {
- compatible = "rockchip,rk3288-vop";
+ compatible = "rockchip,rk3288-vop-big", "rockchip,rk3288-vop";
reg = <0x0 0xff930000 0x0 0x19c>, <0x0 0xff931000 0x0 0x1000>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
@@ -1075,7 +1075,7 @@ vopb_mmu: iommu@...30300 {
};
vopl: vop@...40000 {
- compatible = "rockchip,rk3288-vop";
+ compatible = "rockchip,rk3288-vop-lit", "rockchip,rk3288-vop";
reg = <0x0 0xff940000 0x0 0x19c>, <0x0 0xff941000 0x0 0x1000>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>;
--
2.46.1
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