lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <5154cb18303e4b902bb4f58e66f3dc22fedc4672.camel@xry111.site>
Date: Tue, 24 Sep 2024 15:48:06 +0800
From: Xi Ruoyao <xry111@...111.site>
To: Tiezhu Yang <yangtiezhu@...ngson.cn>, Huacai Chen <chenhuacai@...nel.org>
Cc: loongarch@...ts.linux.dev, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] LoongArch: Enable generic CPU vulnerabilites support

On Tue, 2024-09-24 at 14:20 +0800, Tiezhu Yang wrote:
> Currently, many architectures support generic CPU vulnerabilites,
> such as x86, arm64 and riscv:
> 
>   commit 61dc0f555b5c ("x86/cpu: Implement CPU vulnerabilites sysfs functions")
>   commit 61ae1321f06c ("arm64: enable generic CPU vulnerabilites support")
>   commit 0e3f3649d44b ("riscv: Enable generic CPU vulnerabilites support")
> 
> All LoongArch CPUs (not only LS3A5000)

There will be other LoongArch CPUs (some may be even not designed by
Loongson Technology).  So to me we should match the CPUCFG.PRID value
and report "Unknown: No mitigations" for unknown models, instead of
being too optimistic and report "Not Affected" for them.

-- 
Xi Ruoyao <xry111@...111.site>
School of Aerospace Science and Technology, Xidian University

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ