linux-kernel - Re: [patch v2 3/3] riscv: dts: starfive: add framework dts

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Message-ID: <edfbcf43-60ae-438f-8348-f6a2e6fa31cf@kernel.org>
Date: Tue, 24 Sep 2024 10:24:36 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Sandie Cao <sandie.cao@...pcomputing.io>, Conor Dooley <conor@...nel.org>
Cc: Emil Renner Berthing <kernel@...il.dk>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt
 <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>,
 Heiko Stuebner <heiko.stuebner@...rry.de>,
 Neil Armstrong <neil.armstrong@...aro.org>, rafal@...ecki.pl,
 Linus Walleij <linus.walleij@...aro.org>,
 Michael Zhu <michael.zhu@...rfivetech.com>,
 Drew Fustini <drew@...gleboard.org>, linux-riscv@...ts.infradead.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, dhs@...me.work,
 ams@...me.work, gregkh@...uxfoundation.org, yuning.liang@...pcomputing.io,
 huiming.qiu@...pcomputing.io
Subject: Re: [patch v2 3/3] riscv: dts: starfive: add framework dts

On 24/09/2024 10:06, Sandie Cao wrote:
> Add framework dts to support RISC-V Framework Laptop 13 Mainboard.
> 
> Signed-off-by: Sandie Cao <sandie.cao@...pcomputing.io>
> ---
>  arch/riscv/boot/dts/starfive/Makefile         |  1 +
>  .../boot/dts/starfive/jh7110-framework.dts    | 34 +++++++++++++++++++
>  2 files changed, 35 insertions(+)
>  create mode 100644 arch/riscv/boot/dts/starfive/jh7110-framework.dts

Your threading is entirely broken making applying process more difficult.



> 
> diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile
> index 7a163a7d6ba3..3746f7122834 100644
> --- a/arch/riscv/boot/dts/starfive/Makefile
> +++ b/arch/riscv/boot/dts/starfive/Makefile
> @@ -8,6 +8,7 @@ DTC_FLAGS_jh7110-starfive-visionfive-2-v1.3b := -@
>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight.dtb
>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-visionfive-v1.dtb
>  
> +dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-framework.dtb
>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-milkv-mars.dtb
>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-pine64-star64.dtb
>  dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.2a.dtb
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-framework.dts b/arch/riscv/boot/dts/starfive/jh7110-framework.dts
> new file mode 100644
> index 000000000000..ff12c24ebab3
> --- /dev/null
> +++ b/arch/riscv/boot/dts/starfive/jh7110-framework.dts
> @@ -0,0 +1,34 @@
> +// SPDX-License-Identifier: GPL-2.0 OR MIT
> +/*
> + * Copyright (C) 2022 StarFive Technology Co., Ltd.
> + * Copyright (C) 2022 Emil Renner Berthing <kernel@...il.dk>
> + */
> +
> +/dts-v1/;
> +#include "jh7110-common.dtsi"
> +
> +/ {
> +	model = "Framework FRANME0000";
> +	compatible = "deepcomputing,fm7110", "starfive,jh7110";
> +};
> +
> +&gmac0 {
> +	status = "disabled";
> +};
> +
> +&gmac1 {
> +	status = "disabled";
> +};
> +
> +&usb0 {
> +	dr_mode = "host";
> +	status = "okay";
> +};
> +
> +&pwmdac {
> +	status = "disabled";
> +};
> +
> +&pcie0 {
> +	status = "disabled";

Why PCIE0 is enabled in the DTSI in the first place? The same questions
about MACs.

Best regards,
Krzysztof