linux-kernel - RE: [PATCH v1] ARM: dts: aspeed: yosemite4: Revise quad mode to dual mode

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID:
 <TYZPR04MB5853E0C06B8A019CF1115166D6682@TYZPR04MB5853.apcprd04.prod.outlook.com>
Date: Tue, 24 Sep 2024 09:44:23 +0000
From: Delphine_CC_Chiu/WYHQ/Wiwynn <Delphine_CC_Chiu@...ynn.com>
To: Andrew Jeffery <andrew@...econstruct.com.au>, Delphine_CC_Chiu/WYHQ/Wiwynn
	<Delphine_CC_Chiu@...ynn.com>, "patrick@...cx.xyz" <patrick@...cx.xyz>, Rob
 Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor
 Dooley <conor+dt@...nel.org>, Joel Stanley <joel@....id.au>
CC: Ricky CX Wu <ricky.cx.wu.wiwynn@...il.com>, "devicetree@...r.kernel.org"
	<devicetree@...r.kernel.org>, "linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, "linux-aspeed@...ts.ozlabs.org"
	<linux-aspeed@...ts.ozlabs.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v1] ARM: dts: aspeed: yosemite4: Revise quad mode to dual
 mode



> -----Original Message-----
> From: Andrew Jeffery <andrew@...econstruct.com.au>
> Sent: Thursday, September 12, 2024 10:17 AM
> To: Delphine_CC_Chiu/WYHQ/Wiwynn <Delphine_CC_Chiu@...ynn.com>;
> patrick@...cx.xyz; Rob Herring <robh@...nel.org>; Krzysztof Kozlowski
> <krzk+dt@...nel.org>; Conor Dooley <conor+dt@...nel.org>; Joel Stanley
> <joel@....id.au>
> Cc: Ricky CX Wu <ricky.cx.wu.wiwynn@...il.com>;
> devicetree@...r.kernel.org; linux-arm-kernel@...ts.infradead.org;
> linux-aspeed@...ts.ozlabs.org; linux-kernel@...r.kernel.org
> Subject: Re: [PATCH v1] ARM: dts: aspeed: yosemite4: Revise quad mode to
> dual mode
> 
>  [External Sender]
> 
>  [External Sender]
> 
> On Tue, 2024-09-10 at 13:13 +0800, Delphine CC Chiu wrote:
> > From: Ricky CX Wu <ricky.cx.wu.wiwynn@...il.com>
> >
> > Revise quad mode to dual mode to avoid WP pin influnece the SPI.
> >
> > Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@...il.com>
> > Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@...ynn.com>
> > ---
> >  .../arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 8
> > +++++---
> >  1 file changed, 5 insertions(+), 3 deletions(-)
> >
> > diff --git
> > a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
> > b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
> > index 98477792aa00..3073ade6d77c 100644
> > --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
> > +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
> > @@ -105,15 +105,17 @@ flash@0 {
> >               status = "okay";
> >               m25p,fast-read;
> >               label = "bmc";
> > -             spi-rx-bus-width = <4>;
> > +             spi-tx-bus-width = <2>;
> > +             spi-rx-bus-width = <2>;
> >               spi-max-frequency = <50000000>; -#include
> > "openbmc-flash-layout-64.dtsi"
> > +#include "openbmc-flash-layout-128.dtsi"
> 
> This is a bit more drastic than changing the bus mode.
> 
> Can you please split that out to a separate change with some justification in
> the commit message? For instance, was the chip changed too? Or were you
> using the 64M layout or a 128M chip the whole time?
> 
> Andrew
I'll split the patch in v2. Thanks!