linux-kernel - Re: [PATCH 1/8] dt-bindings: clock: Add Qualcomm IPQ5424 GCC

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Message-ID: <30fdcb3e-a7ff-4764-bed5-39494c3e3326@quicinc.com>
Date: Tue, 24 Sep 2024 17:40:52 +0530
From: Sricharan Ramabadhran <quic_srichara@...cinc.com>
To: Krzysztof Kozlowski <krzk@...nel.org>, <andersson@...nel.org>,
        <konradybcio@...nel.org>, <robh@...nel.org>, <krzk+dt@...nel.org>,
        <conor+dt@...nel.org>, <mturquette@...libre.com>, <sboyd@...nel.org>,
        <ulf.hansson@...aro.org>, <linus.walleij@...aro.org>,
        <catalin.marinas@....com>, <p.zabel@...gutronix.de>,
        <geert+renesas@...der.be>, <dmitry.baryshkov@...aro.org>,
        <neil.armstrong@...aro.org>, <linux-arm-msm@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-clk@...r.kernel.org>, <linux-mmc@...r.kernel.org>,
        <linux-gpio@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>
CC: <quic_varada@...cinc.com>
Subject: Re: [PATCH 1/8] dt-bindings: clock: Add Qualcomm IPQ5424 GCC



On 9/20/2024 6:14 PM, Krzysztof Kozlowski wrote:
> On 20/09/2024 13:56, Sricharan Ramabadhran wrote:
>>
>>>> +
>>>> +allOf:
>>>> +  - $ref: qcom,gcc.yaml#
>>>> +
>>>> +properties:
>>>> +  compatible:
>>>> +    const: qcom,ipq5424-gcc
>>>
>>> So everything i sthe same as 5332? Why not adding it there?
>>>
>> infact, ipq5332 has 1 dual lane and 1 single lane pcie, whereas
>> ipq5424 has 2 dual lane and 2 single lane pcie. will update the
>> bindings in v2 accordingly.
> 
> Hm? What is the difference in the bindings? I don't see. Maybe some diff
> would help.
> 

For IPQ5424, clocks items is like this

       - description: Board XO clock source
       - description: Sleep clock source
       - description: PCIE 2lane PHY0 pipe clock source
       - description: PCIE 2lane PHY1 pipe clock source
       - description: PCIE 2lane PHY2 pipe clock source
       - description: PCIE 2lane PHY3 pipe clock source
       - description: USB PCIE wrapper pipe clock source


For IPQ5332, its like this,

       - description: Board XO clock source
       - description: Sleep clock source
       - description: PCIE 2lane PHY pipe clock source
       - description: PCIE 2lane x1 PHY pipe clock source
       - description: USB PCIE wrapper pipe clock source

So for IPQ5424, there are 2 additional PCI phy's.

So would it be fine to add the new IPQ5424 compatible to
IPQ5322 file itself with a 'if:' of compatibles ?

Regards,
  Sricharan