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Message-ID: <ZvLa+Xhsg9tWY4GH@lizhi-Precision-Tower-5810>
Date: Tue, 24 Sep 2024 11:30:01 -0400
From: Frank Li <Frank.li@....com>
To: Richard Zhu <hongxing.zhu@....com>
Cc: l.stach@...gutronix.de, kwilczynski@...nel.org, bhelgaas@...gle.com,
lpieralisi@...nel.org, robh+dt@...nel.org, conor+dt@...nel.org,
shawnguo@...nel.org, krzysztof.kozlowski+dt@...aro.org,
festevam@...il.com, s.hauer@...gutronix.de,
linux-pci@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
kernel@...gutronix.de, imx@...ts.linux.dev
Subject: Re: [PATCH v1 2/9] PCI: imx6: Add ref clock for i.MX95 PCIe
On Tue, Sep 24, 2024 at 11:27:37AM +0800, Richard Zhu wrote:
> Add "ref" clock to enable reference clock.
>
> If use external clock, ref clock should point to external reference.
>
> If use internal clock, CREF_EN in LAST_TO_REG controls reference output,
> which implement in drivers/clk/imx/clk-imx95-blk-ctl.c.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@....com>
Reviewed-by: Frank Li <Frank.Li@....com>
> ---
> drivers/pci/controller/dwc/pci-imx6.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
> index 0dbc333adcff..2aa02674c817 100644
> --- a/drivers/pci/controller/dwc/pci-imx6.c
> +++ b/drivers/pci/controller/dwc/pci-imx6.c
> @@ -1480,6 +1480,7 @@ static const char * const imx8mm_clks[] = {"pcie_bus", "pcie", "pcie_aux"};
> static const char * const imx8mq_clks[] = {"pcie_bus", "pcie", "pcie_phy", "pcie_aux"};
> static const char * const imx6sx_clks[] = {"pcie_bus", "pcie", "pcie_phy", "pcie_inbound_axi"};
> static const char * const imx8q_clks[] = {"mstr", "slv", "dbi"};
> +static const char * const imx95_clks[] = {"pcie_bus", "pcie", "pcie_phy", "pcie_aux", "ref"};
>
> static const struct imx_pcie_drvdata drvdata[] = {
> [IMX6Q] = {
> @@ -1593,8 +1594,8 @@ static const struct imx_pcie_drvdata drvdata[] = {
> [IMX95] = {
> .variant = IMX95,
> .flags = IMX_PCIE_FLAG_HAS_SERDES,
> - .clk_names = imx8mq_clks,
> - .clks_cnt = ARRAY_SIZE(imx8mq_clks),
> + .clk_names = imx95_clks,
> + .clks_cnt = ARRAY_SIZE(imx95_clks),
> .ltssm_off = IMX95_PE0_GEN_CTRL_3,
> .ltssm_mask = IMX95_PCIE_LTSSM_EN,
> .mode_off[0] = IMX95_PE0_GEN_CTRL_1,
> --
> 2.37.1
>
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