linux-kernel - [RFC PATCH 2/2] acpi,srat: reduce memory block size if CFMWS has a smaller alignment

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Message-ID: <20240925045242.3735-2-gourry@gourry.net>
Date: Wed, 25 Sep 2024 00:52:42 -0400
From: Gregory Price <gourry@...rry.net>
To: linux-acpi@...r.kernel.org,
	x86@...nel.org
Cc: linux-kernel@...r.kernel.org,
	dave.hansen@...ux.intel.com,
	luto@...nel.org,
	peterz@...radead.org,
	tglx@...utronix.de,
	mingo@...hat.com,
	bp@...en8.de,
	hpa@...or.com,
	rafael@...nel.org,
	lenb@...nel.org,
	dan.j.williams@...el.com,
	alison.schofield@...el.com,
	Jonathan.Cameron@...wei.com,
	rrichter@....com,
	ytcoode@...il.com,
	gourry@...rry.net,
	dave.jiang@...el.com,
	haibo1.xu@...el.com
Subject: [RFC PATCH 2/2] acpi,srat: reduce memory block size if CFMWS has a smaller alignment

The CXL Fixed Memory Window allows for memory aligned down to the
size of 256MB.  However, by default, memory blocks increase in size
as total System RAM capacity increases. On x86, this caps out at
2G when 64GB of System RAM is reached.

When the CFMWS regions are not 2GB aligned, this results in lost
capacity on either side of the alignment - regardless of if the
memory is mapped as normal system ram or hotplug.

In ACPI, when the CFMWS is parsed, reduce the block size to the
smallest amount detected if it is less than 2GB.

Suggested-by: Dan Williams <dan.j.williams@...el.com>
Signed-off-by: Gregory Price <gourry@...rry.net>
---
 drivers/acpi/numa/srat.c | 44 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)

diff --git a/drivers/acpi/numa/srat.c b/drivers/acpi/numa/srat.c
index 44f91f2c6c5d..5074e6158dc7 100644
--- a/drivers/acpi/numa/srat.c
+++ b/drivers/acpi/numa/srat.c
@@ -14,6 +14,7 @@
 #include <linux/errno.h>
 #include <linux/acpi.h>
 #include <linux/memblock.h>
+#include <linux/memory.h>
 #include <linux/numa.h>
 #include <linux/nodemask.h>
 #include <linux/topology.h>
@@ -333,6 +334,35 @@ acpi_parse_memory_affinity(union acpi_subtable_headers *header,
 	return 0;
 }
 
+/*
+ * CXL allows CFMW to be aligned along 256MB boundaries, but larger
+ * memory systems typically default to ~2GB memory boundaries for
+ * memblocks. Calculate the largest supported alignment for all CFMWS.
+ *
+ * Only adjust downward if less than 2G, and error on invalid alignment.
+ */
+static int __init acpi_align_cfmws(union acpi_subtable_headers *header,
+				   void *arg, const unsigned long table_end)
+{
+	struct acpi_cedt_cfmws *cfmws = (struct acpi_cedt_cfmws *)header;
+	u64 start = cfmws->base_hpa;
+	u64 size = cfmws->window_size;
+	unsigned long *fin_bz = arg;
+	unsigned long bz;
+
+	for (bz = SZ_2G; bz >= SZ_256M; bz >>= 1) {
+		if (IS_ALIGNED(start, bz) && IS_ALIGNED(size, bz))
+			break;
+	}
+
+	if (bz < *fin_bz && bz >= SZ_256M)
+		*fin_bz = bz;
+	else if (bz < SZ_256M)
+		pr_err("CFMWS: [BIOS BUG] base/size alignment violates spec\n");
+
+	return 0;
+}
+
 static int __init acpi_parse_cfmws(union acpi_subtable_headers *header,
 				   void *arg, const unsigned long table_end)
 {
@@ -501,6 +531,8 @@ acpi_table_parse_srat(enum acpi_srat_type id,
 int __init acpi_numa_init(void)
 {
 	int i, fake_pxm, cnt = 0;
+	unsigned long block_sz = memory_block_size_bytes();
+	unsigned long cfmw_align = block_sz;
 
 	if (acpi_disabled)
 		return -EINVAL;
@@ -552,6 +584,18 @@ int __init acpi_numa_init(void)
 	}
 	last_real_pxm = fake_pxm;
 	fake_pxm++;
+
+	/*
+	 * First parse the CFMWS to determine if the memory block size
+	 * should be smaller than 2G. We don't care about larger sizes,
+	 * this simply avoids losing memory to smaller alignements.
+	 */
+	acpi_table_parse_cedt(ACPI_CEDT_TYPE_CFMWS, acpi_align_cfmws,
+			      &cfmw_align);
+	if (cfmw_align < block_sz && cfmw_align >= SZ_256M)
+		set_memory_block_size_order(ffs(cfmw_align)-1);
+
+	/* Then we need to make a pass to fill the numa nodes */
 	acpi_table_parse_cedt(ACPI_CEDT_TYPE_CFMWS, acpi_parse_cfmws,
 			      &fake_pxm);
 
-- 
2.43.0