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Message-ID: <20240926083617.GA29582@pendragon.ideasonboard.com>
Date: Thu, 26 Sep 2024 11:36:17 +0300
From: Laurent Pinchart <laurent.pinchart@...asonboard.com>
To: "Rob Herring (Arm)" <robh@...nel.org>
Cc: Conor Dooley <conor@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Vinod Koul <vkoul@...nel.org>, Marc Zyngier <maz@...nel.org>,
Thomas Gleixner <tglx@...utronix.de>,
Paul Elder <paul.elder@...asonboard.com>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Alim Akhtar <alim.akhtar@...sung.com>,
Jim Quinlan <jim2101024@...il.com>,
Nicolas Saenz Julienne <nsaenz@...nel.org>,
Florian Fainelli <florian.fainelli@...adcom.com>,
Broadcom internal kernel review list <bcm-kernel-feedback-list@...adcom.com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof Wilczyński <kw@...ux.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>,
Andy Gross <agross@...nel.org>,
Krzysztof Kozlowski <krzk@...nel.org>,
Jim Quinlan <james.quinlan@...adcom.com>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
dmaengine@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-media@...r.kernel.org, linux-samsung-soc@...r.kernel.org,
linux-rpi-kernel@...ts.infradead.org, linux-pci@...r.kernel.org,
linux-arm-msm@...r.kernel.org
Subject: Re: [PATCH] dt-bindings: Fix array property constraints
Hi Rob,
Thank you for the patch.
On Wed, Sep 25, 2024 at 06:24:06PM -0500, Rob Herring (Arm) wrote:
> Schemas for array properties should only have 1 level of array
> constraints (e.g. items, maxItems, minItems). Sometimes the old
> encoding of all properties into a matrix leaked into the schema, and
> didn't matter for validation. Now the inner constraints are just
> silently ignored as json-schema array keywords are ignored on scalar
> values.
>
> Generally, keep the inner constraints and drop the outer "items". With
> gicv3 "mbi-alias" property, it is more appropriately a uint32 or uint64
> as it is an address and size depends on "#address-cells".
I haven't followed what changed in the validation tools, but this is
definitely less confusing. Thanks for improving the experience.
Reviewed-by: Laurent Pinchart <laurent.pinchart@...asonboard.com>
> Signed-off-by: Rob Herring (Arm) <robh@...nel.org>
> ---
> Documentation/devicetree/bindings/cache/l2c2x0.yaml | 5 ++---
> .../devicetree/bindings/dma/dma-common.yaml | 7 +++----
> .../bindings/interrupt-controller/arm,gic-v3.yaml | 12 +++++-------
> .../devicetree/bindings/media/i2c/thine,thp7312.yaml | 3 +--
> .../bindings/memory-controllers/exynos-srom.yaml | 5 ++---
> .../devicetree/bindings/pci/brcm,stb-pcie.yaml | 5 ++---
> .../devicetree/bindings/soc/qcom/qcom,smp2p.yaml | 3 +--
> 7 files changed, 16 insertions(+), 24 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/cache/l2c2x0.yaml b/Documentation/devicetree/bindings/cache/l2c2x0.yaml
> index d7840a5c4037..10c1a900202f 100644
> --- a/Documentation/devicetree/bindings/cache/l2c2x0.yaml
> +++ b/Documentation/devicetree/bindings/cache/l2c2x0.yaml
> @@ -100,9 +100,8 @@ properties:
> filter. Addresses in the filter window are directed to the M1 port. Other
> addresses will go to the M0 port.
> $ref: /schemas/types.yaml#/definitions/uint32-array
> - items:
> - minItems: 2
> - maxItems: 2
> + minItems: 2
> + maxItems: 2
>
> arm,io-coherent:
> description: indicates that the system is operating in an hardware
> diff --git a/Documentation/devicetree/bindings/dma/dma-common.yaml b/Documentation/devicetree/bindings/dma/dma-common.yaml
> index ea700f8ee6c6..fde5160b5d29 100644
> --- a/Documentation/devicetree/bindings/dma/dma-common.yaml
> +++ b/Documentation/devicetree/bindings/dma/dma-common.yaml
> @@ -32,10 +32,9 @@ properties:
> The first item in the array is for channels 0-31, the second is for
> channels 32-63, etc.
> $ref: /schemas/types.yaml#/definitions/uint32-array
> - items:
> - minItems: 1
> - # Should be enough
> - maxItems: 255
> + minItems: 1
> + # Should be enough
> + maxItems: 255
>
> dma-channels:
> $ref: /schemas/types.yaml#/definitions/uint32
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml
> index 5f051c666cbe..f3247a47f9ee 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml
> @@ -132,10 +132,9 @@ properties:
> Address property. Base address of an alias of the GICD region containing
> only the {SET,CLR}SPI registers to be used if isolation is required,
> and if supported by the HW.
> - $ref: /schemas/types.yaml#/definitions/uint32-array
> - items:
> - minItems: 1
> - maxItems: 2
> + oneOf:
> + - $ref: /schemas/types.yaml#/definitions/uint32
> + - $ref: /schemas/types.yaml#/definitions/uint64
>
> ppi-partitions:
> type: object
> @@ -223,9 +222,8 @@ patternProperties:
> (u32, u32) tuple describing the untranslated
> address and size of the pre-ITS window.
> $ref: /schemas/types.yaml#/definitions/uint32-array
> - items:
> - minItems: 2
> - maxItems: 2
> + minItems: 2
> + maxItems: 2
>
> required:
> - compatible
> diff --git a/Documentation/devicetree/bindings/media/i2c/thine,thp7312.yaml b/Documentation/devicetree/bindings/media/i2c/thine,thp7312.yaml
> index 535acf2b88a9..bc339a7374b2 100644
> --- a/Documentation/devicetree/bindings/media/i2c/thine,thp7312.yaml
> +++ b/Documentation/devicetree/bindings/media/i2c/thine,thp7312.yaml
> @@ -135,8 +135,7 @@ properties:
>
> data-lanes:
> $ref: /schemas/media/video-interfaces.yaml#/properties/data-lanes
> - items:
> - maxItems: 4
> + maxItems: 4
> description:
> This property is for lane reordering between the THP7312 and the imaging
> sensor that it is connected to.
> diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.yaml b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.yaml
> index 10a2d97e5f8b..a5598ade399f 100644
> --- a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.yaml
> +++ b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.yaml
> @@ -66,9 +66,8 @@ patternProperties:
>
> samsung,srom-timing:
> $ref: /schemas/types.yaml#/definitions/uint32-array
> - items:
> - minItems: 6
> - maxItems: 6
> + minItems: 6
> + maxItems: 6
> description: |
> Array of 6 integers, specifying bank timings in the following order:
> Tacp, Tcah, Tcoh, Tacc, Tcos, Tacs.
> diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
> index 0925c520195a..2ad1652c2584 100644
> --- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml
> @@ -92,9 +92,8 @@ properties:
> may have two component regions -- base and extended -- so
> this information cannot be deduced from the dma-ranges.
> $ref: /schemas/types.yaml#/definitions/uint64-array
> - items:
> - minItems: 1
> - maxItems: 3
> + minItems: 1
> + maxItems: 3
>
> resets:
> minItems: 1
> diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.yaml
> index 141d666dc3f7..1ba1d419e83b 100644
> --- a/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.yaml
> +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.yaml
> @@ -55,8 +55,7 @@ properties:
>
> qcom,smem:
> $ref: /schemas/types.yaml#/definitions/uint32-array
> - items:
> - maxItems: 2
> + maxItems: 2
> description:
> Two identifiers of the inbound and outbound smem items used for this edge.
>
--
Regards,
Laurent Pinchart
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