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Message-ID: <bf3ea670-4759-462b-8694-87db180ee4b8@phytec.com>
Date: Fri, 27 Sep 2024 16:33:26 -0700
From: Garrett Giordano <ggiordano@...tec.com>
To: Nishanth Menon <nm@...com>
Cc: vigneshr@...com, kristo@...nel.org, robh+dt@...nel.org,
 krzysztof.kozlowski+dt@...aro.org, w.egorov@...tec.de,
 linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, upstream@...ts.phytec.de
Subject: Re: [PATCH 1/2] arm64: dts: ti: am62-phycore-som: Increase cpu
 frequency to 1.4 GHz

Hey Nishanth,

On 9/13/24 11:09, Nishanth Menon wrote:
> On 10:56-20240913, Garrett Giordano wrote:
>> The am625 is capable of running at 1.4 GHz when VDD_CORE is increased
>> from 0.75V to 0.85V. Here we add a 1.4 GHz node to the a53_opp_table and
>> increase the VDD_CORE voltage accordingly.
> The entire argument in introducing the 1.4Ghz overlay seems to have been
> to let users have the choice. What has changed since then?

I talked with the team and we came back with the following:

- Our default PMIC configuration changed for 850000 uV / 1.4 GHz operations

- All available users will receive a PCN on update with instructions 
towards 850000 uV / 1.4 GHz operations

These changes make this overlay obsolete.

>
> Ref: commit 7a5775a3da906dab059b8de60a2b88f6016cb4b8
>
> btw, instead of putting a patch to delete the dtso, you should
> probably consider a revert patch instead.

Thank you, I will send a v2 Monday reverting this patch instead. This 
will also address the Makefile edits.

Regards,

Garrett

>> Signed-off-by: Garrett Giordano <ggiordano@...tec.com>
>> ---
>>   arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi | 11 +++++++++--
>>   1 file changed, 9 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi
>> index ac8959f3d953..8acbd4facf37 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi
>> @@ -205,6 +205,13 @@ AM62X_IOPAD(0x01f4, PIN_INPUT, 0) /* (D16) EXTINTn */
>>   	};
>>   };
>>   
>> +&a53_opp_table {
>> +	opp-1400000000 {
>> +		opp-hz = /bits/ 64 <1400000000>;
>> +		opp-supported-hw = <0x01 0x0004>;
>> +	};
>> +};
>> +
>>   &mcu_m4fss {
>>   	mboxes = <&mailbox0_cluster0 &mbox_m4_0>;
>>   	memory-region = <&mcu_m4fss_dma_memory_region>,
>> @@ -265,8 +272,8 @@ pmic@30 {
>>   		regulators {
>>   			vdd_core: buck1 {
>>   				regulator-name = "VDD_CORE";
>> -				regulator-min-microvolt = <750000>;
>> -				regulator-max-microvolt = <750000>;
>> +				regulator-min-microvolt = <850000>;
>> +				regulator-max-microvolt = <850000>;
>>   				regulator-boot-on;
>>   				regulator-always-on;
>>   			};
>> -- 
>> 2.25.1
>>
>

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