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Message-ID: <CALMp9eSd49O_J=hJKdE0QAcYFY1N1cxG1rKDJH-GUZL7i_VJig@mail.gmail.com>
Date: Fri, 27 Sep 2024 11:52:03 -0700
From: Jim Mattson <jmattson@...gle.com>
To: Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
Dave Hansen <dave.hansen@...ux.intel.com>, "H. Peter Anvin" <hpa@...or.com>,
Sean Christopherson <seanjc@...gle.com>, Paolo Bonzini <pbonzini@...hat.com>,
Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>, Josh Poimboeuf <jpoimboe@...nel.org>,
Jim Mattson <jmattson@...gle.com>, Sandipan Das <sandipan.das@....com>,
Kai Huang <kai.huang@...el.com>, x86@...nel.org, linux-kernel@...r.kernel.org,
kvm@...r.kernel.org
Subject: Re: [PATCH v4 0/3] Distinguish between variants of IBPB
On Fri, Sep 13, 2024 at 10:32 AM Jim Mattson <jmattson@...gle.com> wrote:
>
> Prior to Zen4, AMD's IBPB did not flush the RAS (or, in Intel
> terminology, the RSB). Hence, the older version of AMD's IBPB was not
> equivalent to Intel's IBPB. However, KVM has been treating them as
> equivalent, synthesizing Intel's CPUID.(EAX=7,ECX=0):EDX[bit 26] on any
> platform that supports the synthetic features X86_FEATURE_IBPB and
> X86_FEATURE_IBRS.
>
> Equivalence also requires a previously ignored feature on the AMD side,
> CPUID Fn8000_0008_EBX[IBPB_RET], which is enumerated on Zen4.
>
> v4: Added "guaranteed" to X86_FEATURE_IBPB comment [Pawan]
> Changed logic for deducing AMD IBPB features from Intel IBPB features
> in kvm_set_cpu_caps [Tom]
> Intel CPUs that suffer from PBRSB can't claim AMD_IBPB_RET [myself]
>
> v3: Pass through IBPB_RET from hardware to userspace. [Tom]
> Derive AMD_IBPB from X86_FEATURE_SPEC_CTRL rather than
> X86_FEATURE_IBPB. [Tom]
> Clarify semantics of X86_FEATURE_IBPB.
>
> v2: Use IBPB_RET to identify semantic equality. [Venkatesh]
>
> Jim Mattson (3):
> x86/cpufeatures: Define X86_FEATURE_AMD_IBPB_RET
> KVM: x86: Advertise AMD_IBPB_RET to userspace
> KVM: x86: AMD's IBPB is not equivalent to Intel's IBPB
Oops. I forgot to include the v3 responses:
> For the series:
>
> Reviewed-by: Tom Lendacky <thomas.lendacky@....com>
and
> Assuming this goes through the KVM tree:
>
> Reviewed-by: Thomas Gleixner <tglx@...utronix.de>
The only substantive change was to patch 3/3.
Sean: Are you willing to take this through KVM/x86?
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