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Message-ID: <05f845a4-599d-47cf-9209-33f086c30f5c@linaro.org>
Date: Mon, 30 Sep 2024 10:03:02 +0100
From: Bryan O'Donoghue <bryan.odonoghue@...aro.org>
To: Krzysztof Kozlowski <krzk@...nel.org>,
Depeng Shao <quic_depengs@...cinc.com>,
Vladimir Zapolskiy <vladimir.zapolskiy@...aro.org>, rfoss@...nel.org,
todor.too@...il.com, mchehab@...nel.org, robh@...nel.org,
krzk+dt@...nel.org, conor+dt@...nel.org
Cc: linux-arm-msm@...r.kernel.org, linux-media@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
kernel@...cinc.com, Yongsheng Li <quic_yon@...cinc.com>
Subject: Re: [PATCH 07/13] dt-bindings: media: camss: Add qcom,sm8550-camss
binding
On 30/09/2024 08:26, Krzysztof Kozlowski wrote:
>>> Please sort the list above in numerical order, this will change positions
>>> of "vfe_lite0", "vfe_lite1" etc.
>>>
>>> Another note, since it's not possible to map less than a page, so I believe
>>> it might make sense to align all sizes to 0x1000.
> And if Linux behavior changes then are you going to rewrite all the DTS
> for new size?
>
> No, the sizes reflect hardware register layout, not concept of pages.
>
> I don't think that we should be coming with more nitpicky ideas, one
> month after the patch was sent and reviewed.
Agree.
1. My understanding has always been:
- Map the entire register bank extent
- The main reason for that is today you might only use
1/4 of the registers in a given bank but tomorrow you might
add in new functionality - like the HardISP in which case
you'd want the full set of registers not just the 1/4
or the 4k aligned version of that bank.
2. Pages can be all sorts of sizes so aligning to a page
makes no sense. 4k isn't special.
https://en.wikipedia.org/wiki/Page_(computer_memory)#Multiple_page_sizes
---
bod
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