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Message-ID: <20240930-ploy-outpost-9d16f9573c20@spud>
Date: Mon, 30 Sep 2024 14:47:03 +0100
From: Conor Dooley <conor@...nel.org>
To: pierre-henry.moussay@...rochip.com
Cc: Linux4Microchip@...rochip.com, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Samuel Holland <samuel.holland@...ive.com>,
devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [linux][PATCH v2 06/20] dt-bindings: cache: sifive,ccache0: add
a PIC64GX compatible
On Mon, Sep 30, 2024 at 10:54:35AM +0100, pierre-henry.moussay@...rochip.com wrote:
> From: Pierre-Henry Moussay <pierre-henry.moussay@...rochip.com>
>
> The PIC64GX use the same IP than MPFS, therefore add compatibility with
> MPFS as fallback
>
> Signed-off-by: Pierre-Henry Moussay <pierre-henry.moussay@...rochip.com>
> ---
> Documentation/devicetree/bindings/cache/sifive,ccache0.yaml | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml b/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml
> index 7e8cebe21584..9d064feb2ab1 100644
> --- a/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml
> +++ b/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml
> @@ -47,6 +47,11 @@ properties:
> - const: microchip,mpfs-ccache
> - const: sifive,fu540-c000-ccache
> - const: cache
> + - items:
> + - const: microchip,pic64gx-ccache
> + - const: microchip,mpfs-ccache
> + - const: sifive,fu540-c000-ccache
> + - const: cache
>
> cache-block-size:
> const: 64
> @@ -93,6 +98,7 @@ allOf:
> - starfive,jh7100-ccache
> - starfive,jh7110-ccache
> - microchip,mpfs-ccache
> + - microchip,pic64gx-ccache
Is this required? Shouldn't the fallback activate it?
>
> then:
> properties:
> --
> 2.30.2
>
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